Lines Matching +full:reg +full:- +full:property
11 - compatible: should be one of the following
12 - "marvell,armada-3700-sdhci": For controllers on Armada-3700 SoC.
13 Must provide a second register area and marvell,pad-type.
14 - "marvell,armada-ap806-sdhci": For controllers on Armada AP806.
15 - "marvell,armada-cp110-sdhci": For controllers on Armada CP110.
17 - clocks:
22 - clock-names:
23 Array of names corresponding to clocks property.
27 - reg:
28 * For "marvell,armada-3700-sdhci", two register areas.
31 Please follow the examples with compatible "marvell,armada-3700-sdhci"
33 Please also check property marvell,pad-type in below.
38 - marvell,xenon-sdhc-id:
42 If Xenon IP contains only one SDHC, this property is optional.
44 - marvell,xenon-phy-type:
47 marvell,xenon-phy-type = "emmc 5.1 phy"
48 eMMC 5.1 PHY is the default choice if this property is not provided.
50 marvell,xenon-phy-type = "emmc 5.0 phy"
53 Please note that this property only presents the type of PHY.
54 It doesn't stand for the entire SDHC type or property.
58 - marvell,xenon-phy-znr:
62 ZNR is set as 0xF by default if this property is not provided.
64 - marvell,xenon-phy-zpr:
68 ZPR is set as 0xF by default if this property is not provided.
70 - marvell,xenon-phy-nr-success-tun:
74 Set as 0x4 by default if this property is not provided.
76 - marvell,xenon-phy-tun-step-divider:
78 Set as 64 by default if this property is not provided.
80 - marvell,xenon-phy-slow-mode:
81 If this property is selected, transfers will bypass PHY.
83 Disabled by default. Please only try this property if timing issues
87 - marvell,xenon-tun-count:
88 Xenon SDHC SoC usually doesn't provide re-tuning counter in
90 This property provides the re-tuning counter.
91 If this property is not set, default re-tuning counter will
94 - marvell,pad-type:
96 Only valid when "marvell,armada-3700-sdhci" is selected.
97 Two types: "sd" and "fixed-1-8v".
100 If "fixed-1-8v" is selected, SoC PHY PAD is fixed 1.8V, such as for eMMC.
101 Please follow the examples with compatible "marvell,armada-3700-sdhci"
105 - For eMMC:
108 compatible = "marvell,armada-ap806-sdhci";
109 reg = <0xaa0000 0x1000>;
112 clock-names = "core", "axi";
113 bus-width = <4>;
114 marvell,xenon-phy-slow-mode;
115 marvell,xenon-tun-count = <11>;
116 non-removable;
117 no-sd;
118 no-sdio;
123 - For SD/SDIO:
126 compatible = "marvell,armada-cp110-sdhci";
127 reg = <0xab0000 0x1000>;
129 vqmmc-supply = <&sd_vqmmc_regulator>;
130 vmmc-supply = <&sd_vmmc_regulator>;
132 clock-names = "core", "axi";
133 bus-width = <4>;
134 marvell,xenon-tun-count = <9>;
137 - For eMMC with compatible "marvell,armada-3700-sdhci":
140 compatible = "marvell,armada-3700-sdhci";
141 reg = <0xaa0000 0x1000>,
145 clock-names = "core";
146 bus-width = <8>;
147 mmc-ddr-1_8v;
148 mmc-hs400-1_8v;
149 non-removable;
150 no-sd;
151 no-sdio;
155 marvell,pad-type = "fixed-1-8v";
158 - For SD/SDIO with compatible "marvell,armada-3700-sdhci":
161 compatible = "marvell,armada-3700-sdhci";
162 reg = <0xab0000 0x1000>,
165 vqmmc-supply = <&sd_regulator>;
168 clock-names = "core";
169 bus-width = <4>;
171 marvell,pad-type = "sd";