Lines Matching +full:0 +full:xec600000
129 enum: [0, 1]
150 enum: [0, 2]
151 default: 0
172 reg = <0xe0100000 0x1000>;
176 interrupts = <0 24 4>;
182 reg = <0xe2800000 0x1000>;
186 interrupts = <0 24 4>;
197 reg = <0xfe330000 0x10000>;
207 #clock-cells = <0>;
214 interrupts = <0 48 4>;
215 reg = <0xff160000 0x1000>;
227 interrupts = <0 126 4>;
228 reg = <0xf1040000 0x10000>;
242 reg = <0xec700000 0x300>;
249 #clock-cells = <0>;
260 reg = <0xec600000 0x300>;
267 #clock-cells = <0>;
279 reg = <0x33000000 0x300>;
288 #clock-cells = <0>;
298 reg = <0x31000000 0x300>;