Lines Matching +full:simple +full:- +full:mfd
5 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth
11 The LPC controller is represented as a multi-function device to account for the
24 APB-to-LPC bridging amonst other functions.
27 as LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
39 [1] https://www.renesas.com/en-sg/doc/products/mpumcu/001/rej09b0078_h8s2168.pdf?key=7c888374547021…
40 …el.com/content/dam/www/public/us/en/documents/product-briefs/ipmi-second-gen-interface-spec-v2-rev…
46 - compatible: One of:
47 "aspeed,ast2400-lpc", "simple-mfd"
48 "aspeed,ast2500-lpc", "simple-mfd"
50 - reg: contains the physical address and length values of the Aspeed
53 - #address-cells: <1>
54 - #size-cells: <1>
55 - ranges: Maps 0 to the physical address and length of the LPC memory
62 --------
64 - compatible: One of:
65 "aspeed,ast2400-lpc-bmc"
66 "aspeed,ast2500-lpc-bmc"
68 - reg: contains the physical address and length values of the
69 H8S/2168-compatible LPC controller memory region
72 ---------
74 - compatible: One of:
75 "aspeed,ast2400-lpc-host", "simple-mfd", "syscon"
76 "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"
78 - reg: contains the address and length values of the host-related
81 - #address-cells: <1>
82 - #size-cells: <1>
83 - ranges: Maps 0 to the address and length of the host-related LPC memory
89 compatible = "aspeed,ast2500-lpc", "simple-mfd";
92 #address-cells = <1>;
93 #size-cells = <1>;
96 lpc_bmc: lpc-bmc@0 {
97 compatible = "aspeed,ast2500-lpc-bmc";
101 lpc_host: lpc-host@80 {
102 compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon";
104 reg-io-width = <4>;
106 #address-cells = <1>;
107 #size-cells = <1>;
120 -------------------
123 LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
128 - compatible: One of:
129 "aspeed,ast2400-lpc-ctrl";
130 "aspeed,ast2500-lpc-ctrl";
132 - reg: contains offset/length values of the host interface controller
135 - clocks: contains a phandle to the syscon node describing the clocks.
140 - memory-region: A phandle to a reserved_memory region to be used for the LPC
143 - flash: A phandle to the SPI flash controller containing the flash to
148 lpc-host@80 {
149 lpc_ctrl: lpc-ctrl@0 {
150 compatible = "aspeed,ast2500-lpc-ctrl";
153 memory-region = <&flash_memory>;
159 -------------------
168 - compatible: One of:
169 "aspeed,ast2400-lhc";
170 "aspeed,ast2500-lhc";
172 - reg: contains offset/length values of the LHC memory regions. In the
178 compatible = "aspeed,ast2500-lhc";
183 -----------------
190 - compatible: "aspeed,ast2500-lpc-reset" or
191 "aspeed,ast2400-lpc-reset"
192 - reg: offset and length of the IP in the LHC memory region
193 - #reset-controller indicates the number of reset cells expected
197 lpc_reset: reset-controller@18 {
198 compatible = "aspeed,ast2500-lpc-reset";
200 #reset-cells = <1>;