Lines Matching +full:emc +full:- +full:timings +full:-
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra124-emc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The EMC interfaces with the off-chip SDRAM to service the request stream
19 const: nvidia,tegra124-emc
26 - description: external memory clock
28 clock-names:
30 - const: emc
32 nvidia,memory-controller:
38 "^emc-timings-[0-9]+$":
41 nvidia,ram-code:
48 "^timing-[0-9]+$":
51 clock-frequency:
57 nvidia,emc-auto-cal-config:
61 timings
63 nvidia,emc-auto-cal-config2:
67 timings
69 nvidia,emc-auto-cal-config3:
73 timings
75 nvidia,emc-auto-cal-interval:
82 nvidia,emc-bgbias-ctl0:
85 value of the EMC_BGBIAS_CTL0 register for this set of timings
87 nvidia,emc-cfg:
90 value of the EMC_CFG register for this set of timings
92 nvidia,emc-cfg-2:
95 value of the EMC_CFG_2 register for this set of timings
97 nvidia,emc-ctt-term-ctrl:
100 value of the EMC_CTT_TERM_CTRL register for this set of timings
102 nvidia,emc-mode-1:
105 value of the EMC_MRW register for this set of timings
107 nvidia,emc-mode-2:
110 value of the EMC_MRW2 register for this set of timings
112 nvidia,emc-mode-4:
115 value of the EMC_MRW4 register for this set of timings
117 nvidia,emc-mode-reset:
120 reset value of the EMC_MRS register for this set of timings
122 nvidia,emc-mrs-wait-cnt:
125 value of the EMR_MRS_WAIT_CNT register for this set of timings
127 nvidia,emc-sel-dpd-ctrl:
130 value of the EMC_SEL_DPD_CTRL register for this set of timings
132 nvidia,emc-xm2dqspadctrl2:
135 value of the EMC_XM2DQSPADCTRL2 register for this set of timings
137 nvidia,emc-zcal-cnt-long:
139 number of EMC clocks to wait before issuing any commands after
145 nvidia,emc-zcal-interval:
148 value of the EMC_ZCAL_INTERVAL register for this set of timings
150 nvidia,emc-configuration:
152 EMC timing characterization data. These are the registers (see
153 section "15.6.2 EMC Registers" in the TRM) whose values need to
155 $ref: /schemas/types.yaml#/definitions/uint32-array
157 - description: EMC_RC
158 - description: EMC_RFC
159 - description: EMC_RFC_SLR
160 - description: EMC_RAS
161 - description: EMC_RP
162 - description: EMC_R2W
163 - description: EMC_W2R
164 - description: EMC_R2P
165 - description: EMC_W2P
166 - description: EMC_RD_RCD
167 - description: EMC_WR_RCD
168 - description: EMC_RRD
169 - description: EMC_REXT
170 - description: EMC_WEXT
171 - description: EMC_WDV
172 - description: EMC_WDV_MASK
173 - description: EMC_QUSE
174 - description: EMC_QUSE_WIDTH
175 - description: EMC_IBDLY
176 - description: EMC_EINPUT
177 - description: EMC_EINPUT_DURATION
178 - description: EMC_PUTERM_EXTRA
179 - description: EMC_PUTERM_WIDTH
180 - description: EMC_PUTERM_ADJ
181 - description: EMC_CDB_CNTL_1
182 - description: EMC_CDB_CNTL_2
183 - description: EMC_CDB_CNTL_3
184 - description: EMC_QRST
185 - description: EMC_QSAFE
186 - description: EMC_RDV
187 - description: EMC_RDV_MASK
188 - description: EMC_REFRESH
189 - description: EMC_BURST_REFRESH_NUM
190 - description: EMC_PRE_REFRESH_REQ_CNT
191 - description: EMC_PDEX2WR
192 - description: EMC_PDEX2RD
193 - description: EMC_PCHG2PDEN
194 - description: EMC_ACT2PDEN
195 - description: EMC_AR2PDEN
196 - description: EMC_RW2PDEN
197 - description: EMC_TXSR
198 - description: EMC_TXSRDLL
199 - description: EMC_TCKE
200 - description: EMC_TCKESR
201 - description: EMC_TPD
202 - description: EMC_TFAW
203 - description: EMC_TRPAB
204 - description: EMC_TCLKSTABLE
205 - description: EMC_TCLKSTOP
206 - description: EMC_TREFBW
207 - description: EMC_FBIO_CFG6
208 - description: EMC_ODT_WRITE
209 - description: EMC_ODT_READ
210 - description: EMC_FBIO_CFG5
211 - description: EMC_CFG_DIG_DLL
212 - description: EMC_CFG_DIG_DLL_PERIOD
213 - description: EMC_DLL_XFORM_DQS0
214 - description: EMC_DLL_XFORM_DQS1
215 - description: EMC_DLL_XFORM_DQS2
216 - description: EMC_DLL_XFORM_DQS3
217 - description: EMC_DLL_XFORM_DQS4
218 - description: EMC_DLL_XFORM_DQS5
219 - description: EMC_DLL_XFORM_DQS6
220 - description: EMC_DLL_XFORM_DQS7
221 - description: EMC_DLL_XFORM_DQS8
222 - description: EMC_DLL_XFORM_DQS9
223 - description: EMC_DLL_XFORM_DQS10
224 - description: EMC_DLL_XFORM_DQS11
225 - description: EMC_DLL_XFORM_DQS12
226 - description: EMC_DLL_XFORM_DQS13
227 - description: EMC_DLL_XFORM_DQS14
228 - description: EMC_DLL_XFORM_DQS15
229 - description: EMC_DLL_XFORM_QUSE0
230 - description: EMC_DLL_XFORM_QUSE1
231 - description: EMC_DLL_XFORM_QUSE2
232 - description: EMC_DLL_XFORM_QUSE3
233 - description: EMC_DLL_XFORM_QUSE4
234 - description: EMC_DLL_XFORM_QUSE5
235 - description: EMC_DLL_XFORM_QUSE6
236 - description: EMC_DLL_XFORM_QUSE7
237 - description: EMC_DLL_XFORM_ADDR0
238 - description: EMC_DLL_XFORM_ADDR1
239 - description: EMC_DLL_XFORM_ADDR2
240 - description: EMC_DLL_XFORM_ADDR3
241 - description: EMC_DLL_XFORM_ADDR4
242 - description: EMC_DLL_XFORM_ADDR5
243 - description: EMC_DLL_XFORM_QUSE8
244 - description: EMC_DLL_XFORM_QUSE9
245 - description: EMC_DLL_XFORM_QUSE10
246 - description: EMC_DLL_XFORM_QUSE11
247 - description: EMC_DLL_XFORM_QUSE12
248 - description: EMC_DLL_XFORM_QUSE13
249 - description: EMC_DLL_XFORM_QUSE14
250 - description: EMC_DLL_XFORM_QUSE15
251 - description: EMC_DLI_TRIM_TXDQS0
252 - description: EMC_DLI_TRIM_TXDQS1
253 - description: EMC_DLI_TRIM_TXDQS2
254 - description: EMC_DLI_TRIM_TXDQS3
255 - description: EMC_DLI_TRIM_TXDQS4
256 - description: EMC_DLI_TRIM_TXDQS5
257 - description: EMC_DLI_TRIM_TXDQS6
258 - description: EMC_DLI_TRIM_TXDQS7
259 - description: EMC_DLI_TRIM_TXDQS8
260 - description: EMC_DLI_TRIM_TXDQS9
261 - description: EMC_DLI_TRIM_TXDQS10
262 - description: EMC_DLI_TRIM_TXDQS11
263 - description: EMC_DLI_TRIM_TXDQS12
264 - description: EMC_DLI_TRIM_TXDQS13
265 - description: EMC_DLI_TRIM_TXDQS14
266 - description: EMC_DLI_TRIM_TXDQS15
267 - description: EMC_DLL_XFORM_DQ0
268 - description: EMC_DLL_XFORM_DQ1
269 - description: EMC_DLL_XFORM_DQ2
270 - description: EMC_DLL_XFORM_DQ3
271 - description: EMC_DLL_XFORM_DQ4
272 - description: EMC_DLL_XFORM_DQ5
273 - description: EMC_DLL_XFORM_DQ6
274 - description: EMC_DLL_XFORM_DQ7
275 - description: EMC_XM2CMDPADCTRL
276 - description: EMC_XM2CMDPADCTRL4
277 - description: EMC_XM2CMDPADCTRL5
278 - description: EMC_XM2DQPADCTRL2
279 - description: EMC_XM2DQPADCTRL3
280 - description: EMC_XM2CLKPADCTRL
281 - description: EMC_XM2CLKPADCTRL2
282 - description: EMC_XM2COMPPADCTRL
283 - description: EMC_XM2VTTGENPADCTRL
284 - description: EMC_XM2VTTGENPADCTRL2
285 - description: EMC_XM2VTTGENPADCTRL3
286 - description: EMC_XM2DQSPADCTRL3
287 - description: EMC_XM2DQSPADCTRL4
288 - description: EMC_XM2DQSPADCTRL5
289 - description: EMC_XM2DQSPADCTRL6
290 - description: EMC_DSR_VTTGEN_DRV
291 - description: EMC_TXDSRVTTGEN
292 - description: EMC_FBIO_SPARE
293 - description: EMC_ZCAL_WAIT_CNT
294 - description: EMC_MRS_WAIT_CNT2
295 - description: EMC_CTT
296 - description: EMC_CTT_DURATION
297 - description: EMC_CFG_PIPE
298 - description: EMC_DYN_SELF_REF_CONTROL
299 - description: EMC_QPOP
302 - clock-frequency
303 - nvidia,emc-auto-cal-config
304 - nvidia,emc-auto-cal-config2
305 - nvidia,emc-auto-cal-config3
306 - nvidia,emc-auto-cal-interval
307 - nvidia,emc-bgbias-ctl0
308 - nvidia,emc-cfg
309 - nvidia,emc-cfg-2
310 - nvidia,emc-ctt-term-ctrl
311 - nvidia,emc-mode-1
312 - nvidia,emc-mode-2
313 - nvidia,emc-mode-4
314 - nvidia,emc-mode-reset
315 - nvidia,emc-mrs-wait-cnt
316 - nvidia,emc-sel-dpd-ctrl
317 - nvidia,emc-xm2dqspadctrl2
318 - nvidia,emc-zcal-cnt-long
319 - nvidia,emc-zcal-interval
320 - nvidia,emc-configuration
325 - compatible
326 - reg
327 - clocks
328 - clock-names
329 - nvidia,memory-controller
334 - |
335 #include <dt-bindings/clock/tegra124-car.h>
336 #include <dt-bindings/interrupt-controller/arm-gic.h>
338 mc: memory-controller@70019000 {
339 compatible = "nvidia,tegra124-mc";
342 clock-names = "mc";
346 #iommu-cells = <1>;
347 #reset-cells = <1>;
350 external-memory-controller@7001b000 {
351 compatible = "nvidia,tegra124-emc";
354 clock-names = "emc";
356 nvidia,memory-controller = <&mc>;
358 emc-timings-0 {
359 nvidia,ram-code = <3>;
361 timing-0 {
362 clock-frequency = <12750000>;
364 nvidia,emc-auto-cal-config = <0xa1430000>;
365 nvidia,emc-auto-cal-config2 = <0x00000000>;
366 nvidia,emc-auto-cal-config3 = <0x00000000>;
367 nvidia,emc-auto-cal-interval = <0x001fffff>;
368 nvidia,emc-bgbias-ctl0 = <0x00000008>;
369 nvidia,emc-cfg = <0x73240000>;
370 nvidia,emc-cfg-2 = <0x000008c5>;
371 nvidia,emc-ctt-term-ctrl = <0x00000802>;
372 nvidia,emc-mode-1 = <0x80100003>;
373 nvidia,emc-mode-2 = <0x80200008>;
374 nvidia,emc-mode-4 = <0x00000000>;
375 nvidia,emc-mode-reset = <0x80001221>;
376 nvidia,emc-mrs-wait-cnt = <0x000e000e>;
377 nvidia,emc-sel-dpd-ctrl = <0x00040128>;
378 nvidia,emc-xm2dqspadctrl2 = <0x0130b118>;
379 nvidia,emc-zcal-cnt-long = <0x00000042>;
380 nvidia,emc-zcal-interval = <0x00000000>;
382 nvidia,emc-configuration = <