Lines Matching full:ps
37 - devbus,turn-off-ps: Defines the time during which the controller does not
46 - devbus,badr-skew-ps: Defines the time delay from from A[2:0] toggle,
52 - devbus,acc-first-ps: Defines the time delay from the negation of
57 - devbus,acc-next-ps: Defines the time delay between the cycle that
62 - devbus,rd-setup-ps: Defines the time delay between DEV_CSn assertion to
65 This parameter has no affect on <acc-first-ps> parameter
66 (no affect on first data sample). Set <rd-setup-ps>
67 to a value smaller than <acc-first-ps>.
71 - devbus,rd-hold-ps: Defines the time between the last data sample to the
78 affect on <turn-off-ps> parameter.
79 Set <rd-hold-ps> to a value smaller than <turn-off-ps>.
85 - devbus,ale-wr-ps: Defines the time delay from the ALE[0] negation cycle
89 - devbus,wr-low-ps: Defines the time during which DEV_WEn is active.
95 - devbus,wr-high-ps: Defines the time during which DEV_WEn is kept
98 <wr-high-ps> - <tick> ps.
141 devbus,turn-off-ps = <60000>;
142 devbus,badr-skew-ps = <0>;
143 devbus,acc-first-ps = <124000>;
144 devbus,acc-next-ps = <248000>;
145 devbus,rd-setup-ps = <0>;
146 devbus,rd-hold-ps = <0>;
150 devbus,wr-high-ps = <60000>;
151 devbus,wr-low-ps = <60000>;
152 devbus,ale-wr-ps = <60000>;