Lines Matching +full:data +full:- +full:lanes

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Benoit Parrot <bparrot@ti.com>
12 description: |-
15   processing capability to connect CSI2 image-sensor modules to the
21   Documentation/devicetree/bindings/media/video-interfaces.txt.
27       - ti,dra72-cal
29       - ti,dra72-pre-es2-cal
31       - ti,dra76-cal
33       - ti,am654-cal
38       - description: The CAL main register region
39       - description: The RX Core0 (DPHY0) register region
40       - description: The RX Core1 (DPHY1) register region
42   reg-names:
45       - const: cal_top
46       - const: cal_rx_core0
47       - const: cal_rx_core1
52   ti,camerrx-control:
53     $ref: "/schemas/types.yaml#/definitions/phandle-array"
61   clock-names:
64   power-domains:
70   # See ./video-interfaces.txt for details
76       "#address-cells":
79       "#size-cells":
97               clock-lanes:
100               data-lanes:
104               remote-endpoint: true
107           - reg
124               clock-lanes:
127               data-lanes:
131               remote-endpoint: true
134           - reg
137       - "#address-cells"
138       - "#size-cells"
139       - port@0
142   - compatible
143   - reg
144   - reg-names
145   - interrupts
146   - ti,camerrx-control
151   - |
152     #include <dt-bindings/interrupt-controller/arm-gic.h>
155         compatible = "ti,dra72-cal";
159         reg-names = "cal_top",
163         ti,camerrx-control = <&scm_conf 0xE94>;
166               #address-cells = <1>;
167               #size-cells = <0>;
172                            remote-endpoint = <&csi2_cam0>;
173                            clock-lanes = <0>;
174                            data-lanes = <1 2>;
181         clock-frequency = <400000>;
182         #address-cells = <1>;
183         #size-cells = <0>;
185         camera-sensor@3c {
190                clock-names = "xclk";
194                             remote-endpoint = <&csi2_phy0>;
195                             clock-lanes = <0>;
196                             data-lanes = <1 2>;