Lines Matching +full:exynos5420 +full:- +full:scaler

1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Marek Szyprowski <m.szyprowski@samsung.com>
14   physical memory chunks visible as a contiguous region to DMA-capable peripheral
15   devices like MFC, FIMC, FIMD, GScaler, FIMC-IS and so forth.
20   another capabilities like L2 TLB or block-fetch buffers to minimize translation
29   MFC in all Exynos SoCs and FIMD, M2M Scalers and G2D in Exynos5420 has 2 System
32   * FIMD in Exynos5420 has one System MMU for window 0 and 4, the other system MMU
34   * M2M Scalers and G2D in Exynos5420 has one System MMU on the read channel and
42     const: samsung,exynos-sysmmu
54   clock-names:
56       - items:
57           - const: sysmmu
58       - items:
59           - const: sysmmu
60           - const: master
61       - items:
62           - const: aclk
63           - const: pclk
65   "#iommu-cells":
68   power-domains:
72       Documentation/devicetree/bindings/power/pd-samsung.yaml
76   - compatible
77   - reg
78   - interrupts
79   - clocks
80   - clock-names
81   - "#iommu-cells"
86   - |
87     #include <dt-bindings/clock/exynos5250.h>
89     gsc_0: scaler@13e00000 {
90       compatible = "samsung,exynos5-gsc";
93       power-domains = <&pd_gsc>;
95       clock-names = "gscl";
100       compatible = "samsung,exynos-sysmmu";
102       interrupt-parent = <&combiner>;
104       clock-names = "sysmmu", "master";
107       power-domains = <&pd_gsc>;
108       #iommu-cells = <0>;