Lines Matching +full:non +full:- +full:secure

3 Qualcomm "B" family devices which are not compatible with arm-smmu have
6 to non-secure vs secure interrupt line.
10 - compatible       : Should be one of:
12                         "qcom,msm8916-iommu"
14                      Followed by "qcom,msm-iommu-v1".
16 - clock-names      : Should be a pair of "iface" (required for IOMMUs
20 - clocks           : Phandles for respective clocks described by
21                      clock-names.
23 - #address-cells   : must be 1.
25 - #size-cells      : must be 1.
27 - #iommu-cells     : Must be 1.  Index identifies the context-bank #.
29 - ranges           : Base address and size of the iommu context banks.
31 - qcom,iommu-secure-id  : secure-id.
33 - List of sub-nodes, one per translation context bank.  Each sub-node
36   - compatible     : Should be one of:
37         - "qcom,msm-iommu-v1-ns"  : non-secure context bank
38         - "qcom,msm-iommu-v1-sec" : secure context bank
39   - reg            : Base address and size of context bank within the iommu
40   - interrupts     : The context fault irq.
44 - reg              : Base address and size of the SMMU local base, should
46                      for routing of context bank irq's to secure vs non-
47                      secure lines.  (Ie. if the iommu contains secure
54 		#address-cells = <1>;
55 		#size-cells = <1>;
56 		#iommu-cells = <1>;
57 		compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
62 		clock-names = "iface", "bus";
63 		qcom,iommu-secure-id = <17>;
66 		iommu-ctx@4000 {
67 			compatible = "qcom,msm-iommu-v1-ns";
73 		iommu-ctx@5000 {
74 			compatible = "qcom,msm-iommu-v1-sec";
81 		#address-cells = <1>;
82 		#size-cells = <1>;
83 		#iommu-cells = <1>;
84 		compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
88 		clock-names = "iface", "bus";
89 		qcom,iommu-secure-id = <18>;
92 		iommu-ctx@1000 {
93 			compatible = "qcom,msm-iommu-v1-ns";
99 		iommu-ctx@2000 {
100 			compatible = "qcom,msm-iommu-v1-ns";
108 	venus: video-codec@1d00000 {