Lines Matching +full:icssg +full:- +full:intc
1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/ti,pruss-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI PRU-ICSS Local Interrupt Controller
10 - Suman Anna <s-anna@ti.com>
13 Each PRU-ICSS has a single interrupt controller instance that is common
22 The property "ti,irqs-reserved" is used for denoting the connection
24 defined, it implies that all the PRUSS INTC output interrupts 2 through 9
30 through 19) are connected to new sub-modules within the ICSSG instances.
32 This interrupt-controller node should be defined as a child node of the
33 corresponding PRUSS node. The node should be named "interrupt-controller".
38 - ti,pruss-intc
39 - ti,icssg-intc
41 Use "ti,pruss-intc" for OMAP-L13x/AM18x/DA850 SoCs,
46 Use "ti,icssg-intc" for K3 AM65x & J721E family of SoCs
59 interrupt-names:
63 pattern: host_intr[0-7]
69 interrupt-controller: true
71 "#interrupt-cells":
78 interrupts through 2 levels of many-to-one mapping i.e. events to channel
82 ti,irqs-reserved:
85 Bitmask of host interrupts between 0 and 7 (corresponding to PRUSS INTC
90 Eg: - AM437x and 66AK2G SoCs do not have "host_intr5" interrupt
92 - AM65x and J721E SoCs have "host_intr5", "host_intr6" and
93 "host_intr7" interrupts connected to MPU, and other ICSSG
97 - compatible
98 - reg
99 - interrupts
100 - interrupt-names
101 - interrupt-controller
102 - "#interrupt-cells"
107 - |
108 /* AM33xx PRU-ICSS */
110 compatible = "ti,am3356-pruss";
112 #address-cells = <1>;
113 #size-cells = <1>;
116 pruss_intc: interrupt-controller@20000 {
117 compatible = "ti,pruss-intc";
120 interrupt-names = "host_intr0", "host_intr1",
124 interrupt-controller;
125 #interrupt-cells = <3>;
129 - |
131 /* AM4376 PRU-ICSS */
132 #include <dt-bindings/interrupt-controller/arm-gic.h>
134 compatible = "ti,am4376-pruss";
136 #address-cells = <1>;
137 #size-cells = <1>;
140 interrupt-controller@20000 {
141 compatible = "ti,pruss-intc";
143 interrupt-controller;
144 #interrupt-cells = <3>;
152 interrupt-names = "host_intr0", "host_intr1",
156 ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */