Lines Matching +full:pru +full:- +full:icss
1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/ti,pruss-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI PRU-ICSS Local Interrupt Controller
10 - Suman Anna <s-anna@ti.com>
13 Each PRU-ICSS has a single interrupt controller instance that is common
14 to all the PRU cores. Most interrupt controllers can route 64 input events
18 interrupts (0, 1) are fed exclusively to the internal PRU cores, with the
22 The property "ti,irqs-reserved" is used for denoting the connection
30 through 19) are connected to new sub-modules within the ICSSG instances.
32 This interrupt-controller node should be defined as a child node of the
33 corresponding PRUSS node. The node should be named "interrupt-controller".
38 - ti,pruss-intc
39 - ti,icssg-intc
41 Use "ti,pruss-intc" for OMAP-L13x/AM18x/DA850 SoCs,
46 Use "ti,icssg-intc" for K3 AM65x & J721E family of SoCs
59 interrupt-names:
63 pattern: host_intr[0-7]
69 interrupt-controller: true
71 "#interrupt-cells":
74 Client users shall use the PRU System event number (the interrupt source
75 that the client is interested in) [cell 1], PRU channel [cell 2] and PRU
78 interrupts through 2 levels of many-to-one mapping i.e. events to channel
82 ti,irqs-reserved:
90 Eg: - AM437x and 66AK2G SoCs do not have "host_intr5" interrupt
92 - AM65x and J721E SoCs have "host_intr5", "host_intr6" and
97 - compatible
98 - reg
99 - interrupts
100 - interrupt-names
101 - interrupt-controller
102 - "#interrupt-cells"
107 - |
108 /* AM33xx PRU-ICSS */
110 compatible = "ti,am3356-pruss";
112 #address-cells = <1>;
113 #size-cells = <1>;
116 pruss_intc: interrupt-controller@20000 {
117 compatible = "ti,pruss-intc";
120 interrupt-names = "host_intr0", "host_intr1",
124 interrupt-controller;
125 #interrupt-cells = <3>;
129 - |
131 /* AM4376 PRU-ICSS */
132 #include <dt-bindings/interrupt-controller/arm-gic.h>
134 compatible = "ti,am4376-pruss";
136 #address-cells = <1>;
137 #size-cells = <1>;
140 interrupt-controller@20000 {
141 compatible = "ti,pruss-intc";
143 interrupt-controller;
144 #interrupt-cells = <3>;
152 interrupt-names = "host_intr0", "host_intr1",
156 ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */