Lines Matching +full:adck +full:- +full:max +full:- +full:frequency

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/fsl,vf610-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Fugang Duan <fugang.duan@nxp.com>
17     const: fsl,vf610-adc
29   clock-names:
32   vref-supply:
35   fsl,adck-max-frequency:
36     $ref: /schemas/types.yaml#/definitions/uint32-array
42       * Frequency in normal mode (ADLPC=0, ADHSC=0)
43       * Frequency in high-speed mode (ADLPC=0, ADHSC=1)
44       * Frequency in low-power mode (ADLPC=1, ADHSC=0)
46   min-sample-time:
55   "#io-channel-cells":
59   - compatible
60   - reg
61   - interrupts
62   - clocks
63   - clock-names
64   - vref-supply
69   - |
70     #include <dt-bindings/clock/vf610-clock.h>
72         compatible = "fsl,vf610-adc";
76         clock-names = "adc";
77         fsl,adck-max-frequency = <30000000>, <40000000>, <20000000>;
78         vref-supply = <&reg_vcc_3v3_mcu>;
79         min-sample-time = <10000>;