Lines Matching +full:clock +full:- +full:specifier

9 - compatible:		Should include "ti,omap3-ssi" or "ti,omap4-hsi"
10 - reg-names: Contains the values "sys" and "gdd" (in this order).
11 - reg: Contains a matching register specifier for each entry
12 in reg-names.
13 - interrupt-names: Contains the value "gdd_mpu".
14 - interrupts: Contains matching interrupt information for each entry
15 in interrupt-names.
16 - ranges: Represents the bus address mapping between the main
18 - clock-names: Must include the following entries:
19 "ssi_ssr_fck": The OMAP clock of that name
20 "ssi_sst_fck": The OMAP clock of that name
21 "ssi_ick": The OMAP clock of that name
22 - clocks: Contains a matching clock specifier for each entry in
23 clock-names.
24 - #address-cells: Should be set to <1>
25 - #size-cells: Should be set to <1>
27 Each port is represented as a sub-node of the ti,omap3-ssi device.
29 Required Port sub-node properties:
30 - compatible: Should be set to the following value
31 ti,omap3-ssi-port (applicable to OMAP34xx devices)
32 ti,omap4-hsi-port (applicable to OMAP44xx devices)
33 - reg-names: Contains the values "tx" and "rx" (in this order).
34 - reg: Contains a matching register specifier for each entry
35 in reg-names.
36 - interrupts: Should contain interrupt specifiers for mpu interrupts
38 - ti,ssi-cawake-gpio: Defines which GPIO pin is used to signify CAWAKE
39 events for the port. This is an optional board-specific
44 - ti,hwmods: Shall contain TI interconnect module name if needed
49 ssi-controller@48058000 {
50 compatible = "ti,omap3-ssi";
57 reg-names = "sys",
61 interrupt-names = "gdd_mpu";
66 clock-names = "ssi_ssr_fck",
70 #address-cells = <1>;
71 #size-cells = <1>;
74 ssi-port@4805a000 {
75 compatible = "ti,omap3-ssi-port";
79 reg-names = "tx",
82 interrupt-parent = <&intc>;
86 ti,ssi-cawake-gpio = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* 151 */
89 ssi-port@4805a000 {
90 compatible = "ti,omap3-ssi-port";
94 reg-names = "tx",
97 interrupt-parent = <&intc>;