Lines Matching +full:zynqmp +full:- +full:firmware

2 The ZynqMP SoC uses the PCAP (Processor configuration Port) to configure the
3 Programmable Logic (PL). The configuration uses  the firmware interface.
6 - compatible: should contain "xlnx,zynqmp-pcap-fpga"
10 	fpga-region0 {
11 		compatible = "fpga-region";
12 		fpga-mgr = <&zynqmp_pcap>;
13 		#address-cells = <0x1>;
14 		#size-cells = <0x1>;
17 	firmware {
18 		zynqmp_firmware: zynqmp-firmware {
19 			compatible = "xlnx,zynqmp-firmware";
22 				compatible = "xlnx,zynqmp-pcap-fpga";