Lines Matching +full:non +full:- +full:compliant
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dma/ti/k3-udma.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Ujfalusi <peter.ujfalusi@ti.com>
13 The UDMA-P is intended to perform similar (but significantly upgraded)
14 functions as the packet-oriented DMA used on previous SoC devices. The UDMA-P
16 The UDMA-P architecture facilitates the segmentation and reassembly of SoC DMA
17 data structure compliant packets to/from smaller data blocks that are natively
27 on the Rx PSI-L interface.
29 The UDMA-P also supports acting as both a UTC and UDMA-C for its internal
30 channels. Channels in the UDMA-P can be configured to be either Packet-Based
31 or Third-Party channels on a channel by channel basis.
33 All transfers within NAVSS is done between PSI-L source and destination
35 The peripherals serviced by UDMA can be PSI-L native (sa2ul, cpsw, etc) or
36 legacy, non PSI-L native peripherals. In the later case a special, small PDMA
37 is tasked to act as a bridge between the PSI-L fabric and the legacy
44 - $ref: "../dma-controller.yaml#"
47 "#dma-cells":
51 The cell is the PSI-L thread ID of the remote (to UDMAP) end.
53 for source thread IDs (rx): 0 - 0x7fff
54 for destination thread IDs (tx): 0x8000 - 0xffff
56 Please refer to the device documentation for the PSI-L thread map and also
57 the PSI-L peripheral chapter for the correct thread ID.
59 When #dma-cells is 2, the second parameter is the channel ATYPE.
63 - ti,am654-navss-main-udmap
64 - ti,am654-navss-mcu-udmap
65 - ti,j721e-navss-main-udmap
66 - ti,j721e-navss-mcu-udmap
71 reg-names:
73 - const: gcfg
74 - const: rchanrt
75 - const: tchanrt
77 msi-parent: true
80 description: phandle to TI-SCI compatible System controller node
83 ti,sci-dev-id:
84 description: TI-SCI device id of UDMAP
91 ti,sci-rm-range-tchan:
95 $ref: /schemas/types.yaml#/definitions/uint32-array
100 ti,sci-rm-range-rchan:
104 $ref: /schemas/types.yaml#/definitions/uint32-array
109 ti,sci-rm-range-rflow:
113 $ref: /schemas/types.yaml#/definitions/uint32-array
119 - compatible
120 - "#dma-cells"
121 - reg
122 - reg-names
123 - msi-parent
124 - ti,sci
125 - ti,sci-dev-id
126 - ti,ringacc
127 - ti,sci-rm-range-tchan
128 - ti,sci-rm-range-rchan
129 - ti,sci-rm-range-rflow
133 "#dma-cells":
137 ti,udma-atype:
138 description: ATYPE value which should be used by non slave channels
142 - ti,udma-atype
147 - |+
149 #address-cells = <2>;
150 #size-cells = <2>;
153 compatible = "simple-mfd";
154 #address-cells = <2>;
155 #size-cells = <2>;
156 dma-coherent;
157 dma-ranges;
160 ti,sci-dev-id = <118>;
162 main_udmap: dma-controller@31150000 {
163 compatible = "ti,am654-navss-main-udmap";
167 reg-names = "gcfg", "rchanrt", "tchanrt";
168 #dma-cells = <1>;
172 msi-parent = <&inta_main_udmass>;
175 ti,sci-dev-id = <188>;
177 ti,sci-rm-range-tchan = <0x1>, /* TX_HCHAN */
179 ti,sci-rm-range-rchan = <0x4>, /* RX_HCHAN */
181 ti,sci-rm-range-rflow = <0x6>; /* GP RFLOW */