Lines Matching +full:non +full:- +full:live
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/xlnx/xlnx,zynqmp-dpsub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 +------------------------------------------------------------+
15 +--------+ | +----------------+ +-----------+ |
16 | DPDMA | --->| | --> | Video | Video +-------------+ |
17 | 4x vid | | | | | Rendering | -+--> | | | +------+
18 | 2x aud | | | Audio/Video | --> | Pipeline | | | DisplayPort |---> | PHY0 |
19 +--------+ | | Buffer Manager | +-----------+ | | Source | | +------+
20 | | and STC | +-----------+ | | Controller | | +------+
21 Live Video --->| | --> | Audio | Audio | |---> | PHY1 |
22 | | | | Mixer | --+-> | | | +------+
23 Live Audio --->| | --> | | || +-------------+ |
24 | +----------------+ +-----------+ || |
25 +---------------------------------------||-------------------+
31 live audio/video streams from the programmable logic. The Video Rendering
41 (https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf)
45 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
49 const: xlnx,zynqmp-dpsub-1.7
53 reg-names:
55 - const: dp
56 - const: blend
57 - const: av_buf
58 - const: aud
70 - description: dp_apb_clk is the APB clock
71 - description: dp_aud_clk is the Audio clock
72 - description:
73 dp_vtc_pixel_clk_in is the non-live video clock (from Processing
75 - description:
76 dp_live_video_in_clk is the live video clock (from Programmable
78 clock-names:
80 - minItems: 2
83 - const: dp_apb_clk
84 - enum: [ dp_vtc_pixel_clk_in, dp_live_video_in_clk ]
85 - enum: [ dp_vtc_pixel_clk_in, dp_live_video_in_clk ]
86 - minItems: 3
89 - const: dp_apb_clk
90 - const: dp_aud_clk
91 - enum: [ dp_vtc_pixel_clk_in, dp_live_video_in_clk ]
92 - enum: [ dp_vtc_pixel_clk_in, dp_live_video_in_clk ]
94 power-domains:
103 - description: Video layer, plane 0 (RGB or luma)
104 - description: Video layer, plane 1 (U/V or U)
105 - description: Video layer, plane 2 (V)
106 - description: Graphics layer
107 dma-names:
109 - const: vid0
110 - const: vid1
111 - const: vid2
112 - const: gfx0
118 phy-names:
122 - const: dp-phy0
123 - const: dp-phy1
126 - compatible
127 - reg
128 - reg-names
129 - interrupts
130 - clocks
131 - clock-names
132 - power-domains
133 - resets
134 - dmas
135 - dma-names
136 - phys
137 - phy-names
142 - |
143 #include <dt-bindings/phy/phy.h>
144 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
147 compatible = "xlnx,zynqmp-dpsub-1.7";
152 reg-names = "dp", "blend", "av_buf", "aud";
154 interrupt-parent = <&gic>;
156 clock-names = "dp_apb_clk", "dp_aud_clk", "dp_live_video_in_clk";
159 power-domains = <&pd_dp>;
162 dma-names = "vid0", "vid1", "vid2", "gfx0";
171 phy-names = "dp-phy0", "dp-phy1";