Lines Matching +full:clocks +full:- +full:bindings

5 This is the bindings documentation for the Mobile Display Subsytem(MDSS) that
6 encapsulates sub-blocks like MDP5, DSI, HDMI, eDP etc, and the MDP5 display
11 - compatible:
12   * "qcom,mdss" - MDSS
13 - reg: Physical base address and length of the controller's registers.
14 - reg-names: The names of register regions. The following regions are required:
17 - interrupts: The interrupt signal from MDSS.
18 - interrupt-controller: identifies the node as an interrupt controller.
19 - #interrupt-cells: specifies the number of cells needed to encode an interrupt
21 - power-domains: a power domain consumer specifier according to
22   Documentation/devicetree/bindings/power/power_domain.txt
23 - clocks: device clocks. See ../clocks/clock-bindings.txt for details.
24 - clock-names: the following clocks are required.
28 - #address-cells: number of address cells for the MDSS children. Should be 1.
29 - #size-cells: Should be 1.
30 - ranges: parent bus address space is the same as the child bus address space.
33 - clock-names: the following clocks are optional:
38 - compatible:
39   * "qcom,mdp5" - MDP5
40 - reg: Physical base address and length of the controller's registers.
41 - reg-names: The names of register regions. The following regions are required:
43 - interrupts: Interrupt line from MDP5 to MDSS interrupt controller.
44 - clocks: device clocks. See ../clocks/clock-bindings.txt for details.
45 - clock-names: the following clocks are required.
46 -   * "bus"
47 -   * "iface"
48 -   * "core"
49 -   * "vsync"
50 - ports: contains the list of output ports from MDP. These connect to interfaces
57 	Documentation/devicetree/bindings/graph.txt
58 	Documentation/devicetree/bindings/media/video-interfaces.txt
63 	 Port 0 -> MDP_INTF0 (eDP)
64 	 Port 1 -> MDP_INTF1 (DSI1)
65 	 Port 2 -> MDP_INTF2 (DSI2)
66 	 Port 3 -> MDP_INTF3 (HDMI)
69 	 Port 0 -> MDP_INTF1 (DSI1)
72 	 Port 0 -> MDP_INTF1 (DSI1)
73 	 Port 1 -> MDP_INTF2 (DSI2)
74 	 Port 2 -> MDP_INTF3 (HDMI)
77 - clock-names: the following clocks are optional:
91 		reg-names = "mdss_phys", "vbif_phys";
93 		power-domains = <&gcc MDSS_GDSC>;
95 		clocks = <&gcc GCC_MDSS_AHB_CLK>,
98 		clock-names = "iface",
104 		interrupt-controller;
105 		#interrupt-cells = <1>;
107 		#address-cells = <1>;
108 		#size-cells = <1>;
114 			reg-names = "mdp_phys";
116 			interrupt-parent = <&mdss>;
119 			clocks = <&gcc GCC_MDSS_AHB_CLK>,
123 			clock-names = "iface",
129 				#address-cells = <1>;
130 				#size-cells = <0>;
135 						remote-endpoint = <&dsi0_in>;
148 						remote-endpoint = <&mdp5_intf1_out>;
156 		dsi_phy0: dsi-phy@1a98300 {