Lines Matching +full:phy +full:- +full:names

4 - compatible: one of the following
5    * "qcom,hdmi-tx-8996"
6    * "qcom,hdmi-tx-8994"
7    * "qcom,hdmi-tx-8084"
8    * "qcom,hdmi-tx-8974"
9    * "qcom,hdmi-tx-8660"
10    * "qcom,hdmi-tx-8960"
11 - reg: Physical base address and length of the controller's registers
12 - reg-names: "core_physical"
13 - interrupts: The interrupt signal from the hdmi block.
14 - power-domains: Should be <&mmcc MDSS_GDSC>.
15 - clocks: device clocks
16   See ../clocks/clock-bindings.txt for details.
17 - core-vdda-supply: phandle to supply regulator
18 - hdmi-mux-supply: phandle to mux regulator
19 - phys: the phandle for the HDMI PHY device
20 - phy-names: the name of the corresponding PHY device
23 - hpd-gpios: hpd pin
24 - qcom,hdmi-tx-mux-en-gpios: hdmi mux enable pin
25 - qcom,hdmi-tx-mux-sel-gpios: hdmi mux select pin
26 - qcom,hdmi-tx-mux-lpm-gpios: hdmi mux lpm pin
27 - power-domains: reference to the power domain(s), if available.
28 - pinctrl-names: the pin control state names; should contain "default"
29 - pinctrl-0: the default pinctrl state (active)
30 - pinctrl-1: the "sleep" pinctrl state
32 HDMI PHY:
34 - compatible: Could be the following
35   * "qcom,hdmi-phy-8660"
36   * "qcom,hdmi-phy-8960"
37   * "qcom,hdmi-phy-8974"
38   * "qcom,hdmi-phy-8084"
39   * "qcom,hdmi-phy-8996"
40 - #phy-cells: Number of cells in a PHY specifier; Should be 0.
41 - reg: Physical base address and length of the registers of the PHY sub blocks.
42 - reg-names: The names of register regions. The following regions are required:
45   For HDMI PHY on msm8996, these additional register regions are required:
50 - power-domains: Should be <&mmcc MDSS_GDSC>.
51 - clocks: device clocks
52   See Documentation/devicetree/bindings/clock/clock-bindings.txt for details.
53 - core-vdda-supply: phandle to vdda regulator device node
61 		compatible = "qcom,hdmi-tx-8960";
62 		reg-names = "core_physical";
65 		power-domains = <&mmcc MDSS_GDSC>;
66 		clock-names =
74 		qcom,hdmi-tx-ddc-clk = <&msmgpio 70 GPIO_ACTIVE_HIGH>;
75 		qcom,hdmi-tx-ddc-data = <&msmgpio 71 GPIO_ACTIVE_HIGH>;
76 		qcom,hdmi-tx-hpd = <&msmgpio 72 GPIO_ACTIVE_HIGH>;
77 		core-vdda-supply = <&pm8921_hdmi_mvs>;
78 		hdmi-mux-supply = <&ext_3p3v>;
79 		pinctrl-names = "default", "sleep";
80 		pinctrl-0 = <&hpd_active  &ddc_active  &cec_active>;
81 		pinctrl-1 = <&hpd_suspend &ddc_suspend &cec_suspend>;
84 		phy-names = "hdmi_phy";
87 	hdmi_phy: phy@4a00400 {
88 		compatible = "qcom,hdmi-phy-8960";
89 		reg-names = "hdmi_phy",
93 		#phy-cells = <0>;
94 		power-domains = <&mmcc MDSS_GDSC>;
95 		clock-names = "slave_iface";
97 		core-vdda-supply = <&pm8921_hdmi_mvs>;