Lines Matching +full:0 +full:xfeb90100

63         const: 0
65       port@0:
74       - port@0
125             - dclkin.0
129             - dclkin.0
133             - dclkin.0
162         reg = <0xfeb90000 0x14>;
169             #size-cells = <0>;
171             port@0 {
172                 reg = <0>;
192         reg = <0xfeb90000 0x20>;
196         clock-names = "fck", "dclkin.0", "extal";
204             #size-cells = <0>;
206             port@0 {
207                 reg = <0>;
223         reg = <0xfeb90100 0x20>;
227         clock-names = "fck", "dclkin.0", "extal";
233             #size-cells = <0>;
235             port@0 {
236                 reg = <0>;