Lines Matching +full:iovcc +full:- +full:supply
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/nwl-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Northwest Logic MIPI-DSI controller on i.MX SoCs
10 - Guido Gúnther <agx@sigxcpu.org>
11 - Robert Chiras <robert.chiras@nxp.com>
14 NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for
15 the SOCs NWL MIPI-DSI host controller.
18 - $ref: ../dsi-controller.yaml#
22 const: fsl,imx8mq-nwl-dsi
30 '#address-cells':
33 '#size-cells':
36 assigned-clock-parents: true
37 assigned-clock-rates: true
38 assigned-clocks: true
42 - description: DSI core clock
43 - description: RX_ESC clock (used in escape mode)
44 - description: TX_ESC clock (used in escape mode)
45 - description: PHY_REF clock
46 - description: LCDIF clock
48 clock-names:
50 - const: core
51 - const: rx_esc
52 - const: tx_esc
53 - const: phy_ref
54 - const: lcdif
56 mux-controls:
65 phy-names:
67 - const: dphy
69 power-domains:
74 - description: dsi byte reset line
75 - description: dsi dpi reset line
76 - description: dsi esc reset line
77 - description: dsi pclk reset line
79 reset-names:
81 - const: byte
82 - const: dpi
83 - const: esc
84 - const: pclk
100 '#address-cells':
103 '#size-cells':
107 description: sub-node describing the input from LCDIF
111 description: sub-node describing the input from DCSS
118 - '#address-cells'
119 - '#size-cells'
120 - reg
123 - required:
124 - endpoint@0
125 - required:
126 - endpoint@1
136 '#address-cells':
139 '#size-cells':
143 - '#address-cells'
144 - '#size-cells'
145 - port@0
146 - port@1
151 - '#address-cells'
152 - '#size-cells'
153 - clock-names
154 - clocks
155 - compatible
156 - interrupts
157 - mux-controls
158 - phy-names
159 - phys
160 - ports
161 - reg
162 - reset-names
163 - resets
168 - |
169 #include <dt-bindings/clock/imx8mq-clock.h>
170 #include <dt-bindings/gpio/gpio.h>
171 #include <dt-bindings/interrupt-controller/arm-gic.h>
172 #include <dt-bindings/reset/imx8mq-reset.h>
175 #address-cells = <1>;
176 #size-cells = <0>;
177 compatible = "fsl,imx8mq-nwl-dsi";
184 clock-names = "core", "rx_esc", "tx_esc", "phy_ref", "lcdif";
186 mux-controls = <&mux 0>;
187 power-domains = <&pgc_mipi>;
192 reset-names = "byte", "dpi", "esc", "pclk";
194 phy-names = "dphy";
199 vcc-supply = <®_2v8_p>;
200 iovcc-supply = <®_1v8_p>;
201 reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
204 remote-endpoint = <&mipi_dsi_out>;
210 #address-cells = <1>;
211 #size-cells = <0>;
214 #size-cells = <0>;
215 #address-cells = <1>;
219 remote-endpoint = <&lcdif_mipi_dsi>;
225 remote-endpoint = <&panel_in>;