Lines Matching +full:dsi +full:- +full:controller

1 Cadence DSI bridge
4 The Cadence DSI bridge is a DPI to DSI bridge supporting up to 4 DSI lanes.
7 - compatible: should be set to "cdns,dsi".
8 - reg: physical base address and length of the controller's registers.
9 - interrupts: interrupt line connected to the DSI bridge.
10 - clocks: DSI bridge clocks.
11 - clock-names: must contain "dsi_p_clk" and "dsi_sys_clk".
12 - phys: phandle link to the MIPI D-PHY controller.
13 - phy-names: must contain "dphy".
14 - #address-cells: must be set to 1.
15 - #size-cells: must be set to 0.
18 - resets: DSI reset lines.
19 - reset-names: can contain "dsi_p_rst".
22 - ports: Ports as described in Documentation/devicetree/bindings/graph.txt.
24   * port 0: this port is only needed if some of your DSI devices are
27 	    DSI virtual channel used by this device.
31 - one subnode per DSI device connected on the DSI bus. Each DSI device should
35 	dsi0: dsi@fd0c0000 {
36 		compatible = "cdns,dsi";
39 		clock-names = "dsi_p_clk", "dsi_sys_clk";
42 		phy-names = "dphy";
43 		#address-cells = <1>;
44 		#size-cells = <0>;
47 			#address-cells = <1>;
48 			#size-cells = <0>;
53 					remote-endpoint = <&xxx_dpi_output>;
58 		panel: dsi-dev@0 {
66 	dsi0: dsi@fd0c0000 {
67 		compatible = "cdns,dsi";
70 		clock-names = "dsi_p_clk", "dsi_sys_clk";
73 		phy-names = "dphy";
74 		#address-cells = <1>;
75 		#size-cells = <0>;
78 			#address-cells = <1>;
79 			#size-cells = <0>;
83 				#address-cells = <1>;
84 				#size-cells = <0>;
88 					remote-endpoint = <&dsi_panel_input>;
95 					remote-endpoint = <&xxx_dpi_output>;
108 					remote-endpoint = <&dsi0_output>;