Lines Matching +full:hdmi +full:- +full:cec
1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A83t DWC HDMI TX Encoder Device Tree Bindings
10 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller
12 and CEC.
14 These DT bindings follow the Synopsys DWC HDMI TX bindings defined
16 the following device-specific properties.
19 - Chen-Yu Tsai <wens@csie.org>
20 - Maxime Ripard <mripard@kernel.org>
23 "#phy-cells":
28 - const: allwinner,sun8i-a83t-dw-hdmi
29 - const: allwinner,sun50i-h6-dw-hdmi
31 - items:
32 - enum:
33 - allwinner,sun8i-h3-dw-hdmi
34 - allwinner,sun8i-r40-dw-hdmi
35 - allwinner,sun50i-a64-dw-hdmi
36 - const: allwinner,sun8i-a83t-dw-hdmi
41 reg-io-width:
51 - description: Bus Clock
52 - description: Register Clock
53 - description: TMDS Clock
54 - description: HDMI CEC Clock
55 - description: HDCP Clock
56 - description: HDCP Bus Clock
58 clock-names:
62 - const: iahb
63 - const: isfr
64 - const: tmds
65 - const: cec
66 - const: hdcp
67 - const: hdcp-bus
73 - description: HDMI Controller Reset
74 - description: HDCP Reset
76 reset-names:
80 - const: ctrl
81 - const: hdcp
86 Phandle to the DWC HDMI PHY.
88 phy-names:
91 hvcc-supply:
99 Documentation/devicetree/bindings/media/video-interfaces.txt.
102 "#address-cells":
105 "#size-cells":
117 Output endpoints of the controller. Usually an HDMI
121 - "#address-cells"
122 - "#size-cells"
123 - port@0
124 - port@1
129 - compatible
130 - reg
131 - reg-io-width
132 - interrupts
133 - clocks
134 - clock-names
135 - resets
136 - reset-names
137 - phys
138 - phy-names
139 - ports
146 - allwinner,sun50i-h6-dw-hdmi
153 clock-names:
159 reset-names:
166 - |
167 #include <dt-bindings/interrupt-controller/arm-gic.h>
170 * This comes from the clock/sun8i-a83t-ccu.h and
171 * reset/sun8i-a83t-ccu.h headers, but we can't include them since
180 hdmi@1ee0000 {
181 compatible = "allwinner,sun8i-a83t-dw-hdmi";
183 reg-io-width = <1>;
187 clock-names = "iahb", "isfr", "tmds";
189 reset-names = "ctrl";
191 phy-names = "phy";
192 pinctrl-names = "default";
193 pinctrl-0 = <&hdmi_pins>;
197 #address-cells = <1>;
198 #size-cells = <0>;
204 remote-endpoint = <&tcon1_out_hdmi>;
219 - |
220 #include <dt-bindings/interrupt-controller/arm-gic.h>
223 * This comes from the clock/sun50i-h6-ccu.h and
224 * reset/sun50i-h6-ccu.h headers, but we can't include them since
237 hdmi@6000000 {
238 compatible = "allwinner,sun50i-h6-dw-hdmi";
240 reg-io-width = <1>;
245 clock-names = "iahb", "isfr", "tmds", "cec", "hdcp",
246 "hdcp-bus";
248 reset-names = "ctrl", "hdcp";
250 phy-names = "phy";
251 pinctrl-names = "default";
252 pinctrl-0 = <&hdmi_pins>;
256 #address-cells = <1>;
257 #size-cells = <0>;
263 remote-endpoint = <&tcon_top_hdmi_out_hdmi>;