Lines Matching +full:0 +full:x01c0c000

19     const: 0
128         const: 0
130       port@0:
141           "^endpoint(@[0-9])$":
164       - port@0
390         reg = <0x01c0c000 0x1000>;
401         #clock-cells = <0>;
406             #size-cells = <0>;
408             port@0 {
410                 #size-cells = <0>;
411                 reg = <0>;
413                 endpoint@0 {
414                     reg = <0>;
426                 #size-cells = <0>;
462         reg = <0x01c0c000 0x1000>;
476         #clock-cells = <0>;
480             #size-cells = <0>;
482             port@0 {
484                 #size-cells = <0>;
485                 reg = <0>;
487                 endpoint@0 {
488                     reg = <0>;
500                 #size-cells = <0>;
537         reg = <0x03c00000 0x10000>;
544         #clock-cells = <0>;
548             #size-cells = <0>;
550             port@0 {
551                 reg = <0>;
587         reg = <0x01c0c000 0x1000>;
592         #clock-cells = <0>;
598             #size-cells = <0>;
600             port@0 {
602                 #size-cells = <0>;
603                 reg = <0>;
605                 endpoint@0 {
606                     reg = <0>;
642         reg = <0x01c73000 0x1000>;
644         clocks = <&ccu CLK_BUS_TCON_TV0>, <&tcon_top 0>;
651             #size-cells = <0>;
653             port@0 {
655                 #size-cells = <0>;
656                 reg = <0>;
658                 endpoint@0 {
659                     reg = <0>;
671                 #size-cells = <0>;