Lines Matching +full:zynqmp +full:- +full:firmware

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/xlnx,versal-clk.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Michal Simek <michal.simek@xilinx.com>
11   - Jolly Shah <jolly.shah@xilinx.com>
12   - Rajan Vaja <rajan.vaja@xilinx.com>
23     const: xlnx,versal-clk
25   "#clock-cells":
32       - description: reference clock
33       - description: alternate reference clock
34       - description: alternate reference clock for programmable logic
36   clock-names:
38       - const: ref
39       - const: alt_ref
40       - const: pl_alt_ref
43   - compatible
44   - "#clock-cells"
45   - clocks
46   - clock-names
51   - |
52     firmware {
53       zynqmp_firmware: zynqmp-firmware {
54         compatible = "xlnx,zynqmp-firmware";
56         versal_clk: clock-controller {
57           #clock-cells = <1>;
58           compatible = "xlnx,versal-clk";
60           clock-names = "ref", "alt_ref", "pl_alt_ref";