Lines Matching full:divider

1 Binding for TI divider clock
6 register-mapped adjustable clock rate divider that does not gate and has
44 The binding must also provide the register to control the divider and
45 unless the divider array is provided, min and max dividers. Optionally
56 - compatible : shall be "ti,divider-clock" or "ti,composite-divider-clock".
59 - reg : offset for register controlling adjustable divider
64 - ti,bit-shift : number of bits to shift the divider value, defaults to 0
78 - ti,latch-bit : latch the divider value to HW, only needed if the register
79   access requires this. As an example dra76x DPLL_GMAC H14 divider implements
85 	compatible = "ti,divider-clock";
94 	compatible = "ti,divider-clock";
103 	compatible = "ti,composite-divider-clock";
112 	compatible = "ti,composite-divider-clock";