Lines Matching +full:omap +full:- +full:l13x

1 Binding for TI DA8XX/OMAP-L13X/AM17XX/AM18XX CFGCHIP clocks
3 TI DA8XX/OMAP-L13X/AM17XX/AM18XX SoCs contain a general purpose set of
8 (compatible = "ti,da830-cfgchip").
11 --------------
13 - compatible: shall be "ti,da830-usb-phy-clocks".
14 - #clock-cells: from common clock binding; shall be set to 1.
15 - clocks: phandles to the parent clocks corresponding to clock-names
16 - clock-names: shall be "fck", "usb_refclkin", "auxclk"
22 ------------------------------
24 - compatible: shall be "ti,da830-tbclksync".
25 - #clock-cells: from common clock binding; shall be set to 0.
26 - clocks: phandle to the parent clock
27 - clock-names: shall be "fck"
30 ------------------
32 - compatible: shall be "ti,da830-div4p5ena".
33 - #clock-cells: from common clock binding; shall be set to 0.
34 - clocks: phandle to the parent clock
35 - clock-names: shall be "pll0_pllout"
38 ---------------------------
40 - compatible: shall be "ti,da850-async1-clksrc".
41 - #clock-cells: from common clock binding; shall be set to 0.
42 - clocks: phandles to the parent clocks corresponding to clock-names
43 - clock-names: shall be "pll0_sysclk3", "div4.5"
46 -------------------
48 - compatible: shall be "ti,da850-async3-clksrc".
49 - #clock-cells: from common clock binding; shall be set to 0.
50 - clocks: phandles to the parent clocks corresponding to clock-names
51 - clock-names: shall be "pll0_sysclk2", "pll1_sysclk2"
56 		compatible = "ti,da830-cfgchip", "syscon", "simple-mfd";
59 		usb_phy_clk: usb-phy-clocks {
60 			compatible = "ti,da830-usb-phy-clocks";
61 			#clock-cells = <1>;
63 			clock-names = "fck", "usb_refclkin", "auxclk";
66 			compatible = "ti,da830-tbclksync";
67 			#clock-cells = <0>;
69 			clock-names = "fck";
72 			compatible = "ti,da830-div4p5ena";
73 			#clock-cells = <0>;
75 			clock-names = "pll0_pllout";
78 			compatible = "ti,da850-async1-clksrc";
79 			#clock-cells = <0>;
81 			clock-names = "pll0_sysclk3", "div4.5";
84 			compatible = "ti,da850-async3-clksrc";
85 			#clock-cells = <0>;
87 			clock-names = "pll0_sysclk2", "pll1_sysclk2";
92 - Documentation/devicetree/bindings/clock/clock-bindings.txt