Lines Matching +full:clock +full:- +full:specifier
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/clock/renesas,cpg-mssr.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Renesas Clock Pulse Generator / Module Standby and Software Reset
10 - Geert Uytterhoeven <geert+renesas@glider.be>
13 On Renesas ARM SoCs (SH/R-Mobile, R-Car, RZ), the CPG (Clock Pulse Generator)
18 - The CPG block generates various core clocks,
19 - The MSSR block provides two functions:
20 1. Module Standby, providing a Clock Domain to control the clock supply
27 - renesas,r7s9210-cpg-mssr # RZ/A2
28 - renesas,r8a7742-cpg-mssr # RZ/G1H
29 - renesas,r8a7743-cpg-mssr # RZ/G1M
30 - renesas,r8a7744-cpg-mssr # RZ/G1N
31 - renesas,r8a7745-cpg-mssr # RZ/G1E
32 - renesas,r8a77470-cpg-mssr # RZ/G1C
33 - renesas,r8a774a1-cpg-mssr # RZ/G2M
34 - renesas,r8a774b1-cpg-mssr # RZ/G2N
35 - renesas,r8a774c0-cpg-mssr # RZ/G2E
36 - renesas,r8a774e1-cpg-mssr # RZ/G2H
37 - renesas,r8a7790-cpg-mssr # R-Car H2
38 - renesas,r8a7791-cpg-mssr # R-Car M2-W
39 - renesas,r8a7792-cpg-mssr # R-Car V2H
40 - renesas,r8a7793-cpg-mssr # R-Car M2-N
41 - renesas,r8a7794-cpg-mssr # R-Car E2
42 - renesas,r8a7795-cpg-mssr # R-Car H3
43 - renesas,r8a7796-cpg-mssr # R-Car M3-W
44 - renesas,r8a77961-cpg-mssr # R-Car M3-W+
45 - renesas,r8a77965-cpg-mssr # R-Car M3-N
46 - renesas,r8a77970-cpg-mssr # R-Car V3M
47 - renesas,r8a77980-cpg-mssr # R-Car V3H
48 - renesas,r8a77990-cpg-mssr # R-Car E3
49 - renesas,r8a77995-cpg-mssr # R-Car D3
50 - renesas,r8a779a0-cpg-mssr # R-Car V3U
59 clock-names:
64 - extal # All
65 - extalr # Most R-Car Gen3 and RZ/G2
66 - usb_extal # Most R-Car Gen2 and RZ/G1
68 '#clock-cells':
70 - For CPG core clocks, the two clock specifier cells must be "CPG_CORE"
71 and a core clock reference, as defined in
72 <dt-bindings/clock/*-cpg-mssr.h>
73 - For module clocks, the two clock specifier cells must be "CPG_MOD" and
77 '#power-domain-cells':
79 SoC devices that are part of the CPG/MSSR Clock Domain and can be
80 power-managed through Module Standby should refer to the CPG device node
81 in their "power-domains" property, as documented by the generic PM Domain
82 bindings in Documentation/devicetree/bindings/power/power-domain.yaml.
85 '#reset-cells':
87 The single reset specifier cell must be the module number, as defined in
97 - renesas,r7s9210-cpg-mssr
100 - '#reset-cells'
103 - compatible
104 - reg
105 - clocks
106 - clock-names
107 - '#clock-cells'
108 - '#power-domain-cells'
113 - |
114 cpg: clock-controller@e6150000 {
115 compatible = "renesas,r8a7795-cpg-mssr";
118 clock-names = "extal", "extalr";
119 #clock-cells = <2>;
120 #power-domain-cells = <0>;
121 #reset-cells = <1>;