Lines Matching +full:imx7d +full:- +full:clock

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/imx8qxp-lpcg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock bindings
10   - Aisheng Dong <aisheng.dong@nxp.com>
13   The Low-Power Clock Gate (LPCG) modules contain a local programming
14   model to control the clock gates for the peripherals. An LPCG module
17   This level of clock gating is provided after the clocks are generated
18   by the SCU resources and clock controls. Thus even if the clock is
22   The clock consumer should specify the desired clock by having the clock
23   ID in its "clocks" phandle cell. See the full list of clock IDs from:
24   include/dt-bindings/clock/imx8-clock.h
29       - fsl,imx8qxp-lpcg-adma
30       - fsl,imx8qxp-lpcg-conn
31       - fsl,imx8qxp-lpcg-dc
32       - fsl,imx8qxp-lpcg-dsp
33       - fsl,imx8qxp-lpcg-gpu
34       - fsl,imx8qxp-lpcg-hsio
35       - fsl,imx8qxp-lpcg-img
36       - fsl,imx8qxp-lpcg-lsio
37       - fsl,imx8qxp-lpcg-vpu
42   '#clock-cells':
46   - compatible
47   - reg
48   - '#clock-cells'
53   - |
54     #include <dt-bindings/clock/imx8-clock.h>
55     #include <dt-bindings/firmware/imx/rsrc.h>
56     #include <dt-bindings/interrupt-controller/arm-gic.h>
58     clock-controller@5b200000 {
59         compatible = "fsl,imx8qxp-lpcg-conn";
61         #clock-cells = <1>;
65         compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc";
71         clock-names = "ipg", "per", "ahb";
72         power-domains = <&pd IMX_SC_R_SDHC_0>;