Lines Matching refs:clocks

10     which generates clocks for IMEM/FSYS/G3D/GSCL/HEVC/MSCL/G2D/MFC/PERIC/PERIS
11     domains and bus clocks.
13     which generates clocks for LLI (Low Latency Interface) IP.
15     which generates clocks for DRAM Memory Controller domain.
17     which generates clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS IPs.
19     which generates clocks for PMU/TMU/MCT/WDT/RTC/SECKEY/TZPC IPs.
21     which generates clocks for USB/UFS/SDMMC/TSI/PDMA IPs.
23     which generates clocks for G2D/MDMA IPs.
25     which generates clocks for Display (DECON/HDMI/DSIM/MIXER) IPs.
27     which generates clocks for Cortex-A5/BUS/AUDIO clocks.
32     which generates clocks for 3D Graphics Engine IP.
34     which generates clocks for GSCALER IPs.
36     which generates clocks for Cortex-A53 Quad-core processor.
38     which generates clocks for Cortex-A57 Quad-core processor, CoreSight and
41     which generates clocks for M2M (Memory to Memory) scaler and JPEG IPs.
43     which generates clocks for MFC(Multi-Format Codec) IP.
45     which generates clocks for HEVC(High Efficiency Video Codec) decoder IP.
47     which generates clocks for FIMC-ISP/DRC/SCLC/DIS/3DNR IPs.
49     which generates clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1}
52     which generates clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs.
54     which generates clocks for SSS (Security SubSystem) and SlimSSS IPs.
61 - clocks: list of the clock controller input clock identifiers,
63 	to find the input clocks for a given controller.
68 	Input clocks for top clock controller:
74 	Input clocks for cpif clock controller:
77 	Input clocks for mif clock controller:
81 	Input clocks for fsys clock controller:
93 	Input clocks for g2d clock controller:
98 	Input clocks for disp clock controller:
109 	Input clocks for audio clock controller:
113 	Input clocks for bus0 clock controller:
116 	Input clocks for bus1 clock controller:
119 	Input clocks for bus2 clock controller:
123 	Input clocks for g3d clock controller:
127 	Input clocks for gscl clock controller:
132 	Input clocks for apollo clock controller:
136 	Input clocks for atlas clock controller:
140 	Input clocks for mscl clock controller:
145 	Input clocks for mfc clock controller:
149 	Input clocks for hevc clock controller:
153 	Input clocks for isp clock controller:
158 	Input clocks for cam0 clock controller:
164 	Input clocks for cam1 clock controller:
173 	Input clocks for imem clock controller:
187 All available clocks are defined as preprocessor macros in
210 		clocks = <&xxti>,
222 		clocks = <&xxti>;
232 		clocks = <&xxti>,
263 		clocks = <&xxti>,
283 		clocks = <&xxti>,
303 		clocks = <&xxti>,
321 		clocks = <&xxti>, <&cmu_top CLK_FOUT_AUD_PLL>;
331 		clocks = <&cmu_top CLK_ACLK_BUS0_400>;
340 		clocks = <&cmu_top CLK_ACLK_BUS1_400>;
349 		clocks = <&xxti>, <&cmu_mif CLK_ACLK_BUS2_400>;
358 		clocks = <&xxti>, <&cmu_top CLK_ACLK_G3D_400>;
370 		clocks = <&xxti>,
382 		clocks = <&xxti>, <&cmu_mif CLK_SCLK_BUS_PLL_APOLLO>;
391 		clocks = <&xxti>, <&cmu_mif CLK_SCLK_BUS_PLL_ATLAS>;
402 		clocks = <&xxti>,
414 		clocks = <&xxti>, <&cmu_top CLK_ACLK_MFC_400>;
424 		clocks = <&xxti>, <&cmu_top CLK_ACLK_HEVC_400>;
436 		clocks = <&xxti>,
451 		clocks = <&xxti>,
470 		clocks = <&xxti>,
489 		clocks = <&xxti>,
502 		clocks = <&cmu_peric CLK_PCLK_UART0>,