Lines Matching +full:s5pv210 +full:- +full:i2s

4 to Audio Subsystem block available in the S5PV210 and compatible SoCs.
8 - compatible: should be "samsung,s5pv210-audss-clock".
9 - reg: physical base address and length of the controller's register set.
11 - #clock-cells: should be 1.
13 - clocks:
14   - hclk: AHB bus clock of the Audio Subsystem.
15   - xxti: Optional fixed rate PLL reference clock, parent of mout_audss. If
18   - fout_epll: Input PLL to the AudioSS block, parent of mout_audss.
19   - iiscdclk0: Optional external i2s clock, parent of mout_i2s. If not
21   - sclk_audio0: Audio bus clock, parent of mout_i2s.
23 - clock-names: Aliases for the above clocks. They should be "hclk",
27 dt-bindings/clock/s5pv210-audss-clk.h header and can be used in device
32 	clk_audss: clock-controller@c0900000 {
33 		compatible = "samsung,s5pv210-audss-clock";
35 		#clock-cells = <1>;
36 		clock-names = "hclk", "xxti",
42 Example: I2S controller node that consumes the clock generated by the clock
44          about 'clocks' and 'clock-names' property.
46 	i2s0: i2s@3830000 {
48 		clock-names = "iis", "i2s_opclk0",