Lines Matching +full:axi +full:- +full:apb

3 The Tegra ACONNECT bus is an AXI switch which is used to connnect various
5 the APE subsystem go through the ACONNECT via an APB to AXI wrapper.
8 - compatible: Must be "nvidia,tegra210-aconnect".
9 - clocks: Must contain the entries for the APE clock (TEGRA210_CLK_APE),
11 - clock-names: Must contain the names "ape" and "apb2ape" for the corresponding
13 - power-domains: Must contain a phandle that points to the audio powergate
15 - #address-cells: The number of cells used to represent physical base addresses
17 - #size-cells: The number of cells used to represent the size of an address
19 - ranges: Mapping of the aconnect address space to the CPU address space.
21 All devices accessed via the ACONNNECT are described by child-nodes.
26 		compatible = "nvidia,tegra210-aconnect";
29 		clock-names = "ape", "apb2ape";
30 		power-domains = <&pd_audio>;
32 		#address-cells = <1>;
33 		#size-cells = <1>;