Lines Matching +full:cortex +full:- +full:a7
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/idle-states.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
14 1 - Introduction
18 where cores can be put in different low-power states (ranging from simple wfi
20 range of dynamic idle states that a processor can enter at run-time, can be
27 - Running
28 - Idle_standby
29 - Idle_retention
30 - Sleep
31 - Off
37 wake-up capabilities, hence it is not considered in this document).
47 2 - idle-states definitions
60 |<------ entry ------->|
62 |<- exit ->|
64 |<-------- min-residency -------->|
65 |<------- wakeup-latency ------->|
72 like cache flushing. This is abortable on pending wake-up
81 IDLE: This is the actual energy-saving idle period. This may last
82 between 0 and infinite time, until a wake-up event occurs.
87 entry-latency: Worst case latency required to enter the idle state. The
88 exit-latency may be guaranteed only after entry-latency has passed.
90 min-residency: Minimum period, including preparation and entry, for a given
93 wakeup-latency: Maximum delay between the signaling of a wake-up event and the
95 to be entry-latency + exit-latency.
99 An idle CPU requires the expected min-residency time to select the most
101 (i.e. wake-up) that causes the CPU to return to the EXEC phase.
103 An operating system scheduler may need to compute the shortest wake-up delay
107 wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0)
110 (e.g. waking-up) the CPU with the shortest wake-up delay.
111 The wake-up delay must take into account the entry latency if that period
117 An OS has to reliably probe the wakeup-latency since some devices can enforce
119 worst case wake-up latency it can incur if a CPU is allowed to enter an
123 The min-residency time parameter deserves further explanation since it is
133 n | /---
134 e | /------
135 r | /------
136 g | /-----
137 y | /------
138 | ----
146 -----|-------+----------------------------------
151 The graph is split in two parts delimited by time 1ms on the X-axis.
152 The graph curve with X-axis values = { x | 0 < x < 1ms } has a steep slope
155 The graph curve in the area delimited by X-axis values = {x | x > 1ms } has
159 min-residency is defined for a given idle state as the minimum expected
171 | /-- IDLE1
172 e | /---
173 n | /----
174 e | /---
175 r | /-----/--------- IDLE2
176 g | /-------/---------
177 y | ------------ /---|
178 | / /---- |
179 | / /--- |
180 | / /---- |
181 | / /--- |
182 | --- |
186 ---/----------------------------+------------------------
187 |IDLE1-energy < IDLE2-energy | IDLE2-energy < IDLE1-energy
189 IDLE2-min-residency
191 Graph 2: idle states min-residency example
195 wake-up IRQ) is less than IDLE2-min-residency, IDLE1 is the better idle state
207 IDLE2-min-residency and corresponds to the time when energy consumption of
214 3 - idle-states node
217 ARM processor idle states are defined within the idle-states node, which is
223 just supports idle_standby, an idle-states node is not required.
226 4 - References
229 [1] ARM Linux Kernel documentation - CPUs bindings
232 [2] ARM Linux Kernel documentation - PSCI bindings
241 [6] ARM Linux Kernel documentation - Booting AArch64 Linux
246 const: idle-states
248 entry-method:
252 On ARM v8 64-bit this property is required.
253 On ARM 32-bit systems this property is optional
255 This assumes that the "enable-method" property is set to "psci" in the cpu
261 "^(cpu|cluster)-":
272 additional properties specific to the entry-method defined in the
273 idle-states node. Please refer to the entry-method bindings
278 const: arm,idle-state
280 local-timer-stop:
286 entry-latency-us:
290 exit-latency-us:
293 The exit-latency-us duration may be guaranteed only after
294 entry-latency-us has passed.
296 min-residency-us:
302 wakeup-latency-us:
304 Maximum delay between the signaling of a wake-up event and the CPU
308 entry-latency-us + exit-latency-us
311 PREP phase (see diagram 1, section 2) is non-neglibigle. In such
312 systems entry-latency-us + exit-latency-us will exceed
313 wakeup-latency-us by this duration.
315 idle-state-name:
321 - compatible
322 - entry-latency-us
323 - exit-latency-us
324 - min-residency-us
329 - |
332 #size-cells = <0>;
333 #address-cells = <2>;
337 compatible = "arm,cortex-a57";
339 enable-method = "psci";
340 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
346 compatible = "arm,cortex-a57";
348 enable-method = "psci";
349 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
355 compatible = "arm,cortex-a57";
357 enable-method = "psci";
358 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
364 compatible = "arm,cortex-a57";
366 enable-method = "psci";
367 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
373 compatible = "arm,cortex-a57";
375 enable-method = "psci";
376 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
382 compatible = "arm,cortex-a57";
384 enable-method = "psci";
385 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
391 compatible = "arm,cortex-a57";
393 enable-method = "psci";
394 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
400 compatible = "arm,cortex-a57";
402 enable-method = "psci";
403 cpu-idle-states = <&CPU_RETENTION_0_0 &CPU_SLEEP_0_0
409 compatible = "arm,cortex-a53";
411 enable-method = "psci";
412 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
418 compatible = "arm,cortex-a53";
420 enable-method = "psci";
421 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
427 compatible = "arm,cortex-a53";
429 enable-method = "psci";
430 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
436 compatible = "arm,cortex-a53";
438 enable-method = "psci";
439 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
445 compatible = "arm,cortex-a53";
447 enable-method = "psci";
448 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
454 compatible = "arm,cortex-a53";
456 enable-method = "psci";
457 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
463 compatible = "arm,cortex-a53";
465 enable-method = "psci";
466 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
472 compatible = "arm,cortex-a53";
474 enable-method = "psci";
475 cpu-idle-states = <&CPU_RETENTION_1_0 &CPU_SLEEP_1_0
479 idle-states {
480 entry-method = "psci";
482 CPU_RETENTION_0_0: cpu-retention-0-0 {
483 compatible = "arm,idle-state";
484 arm,psci-suspend-param = <0x0010000>;
485 entry-latency-us = <20>;
486 exit-latency-us = <40>;
487 min-residency-us = <80>;
490 CLUSTER_RETENTION_0: cluster-retention-0 {
491 compatible = "arm,idle-state";
492 local-timer-stop;
493 arm,psci-suspend-param = <0x1010000>;
494 entry-latency-us = <50>;
495 exit-latency-us = <100>;
496 min-residency-us = <250>;
497 wakeup-latency-us = <130>;
500 CPU_SLEEP_0_0: cpu-sleep-0-0 {
501 compatible = "arm,idle-state";
502 local-timer-stop;
503 arm,psci-suspend-param = <0x0010000>;
504 entry-latency-us = <250>;
505 exit-latency-us = <500>;
506 min-residency-us = <950>;
509 CLUSTER_SLEEP_0: cluster-sleep-0 {
510 compatible = "arm,idle-state";
511 local-timer-stop;
512 arm,psci-suspend-param = <0x1010000>;
513 entry-latency-us = <600>;
514 exit-latency-us = <1100>;
515 min-residency-us = <2700>;
516 wakeup-latency-us = <1500>;
519 CPU_RETENTION_1_0: cpu-retention-1-0 {
520 compatible = "arm,idle-state";
521 arm,psci-suspend-param = <0x0010000>;
522 entry-latency-us = <20>;
523 exit-latency-us = <40>;
524 min-residency-us = <90>;
527 CLUSTER_RETENTION_1: cluster-retention-1 {
528 compatible = "arm,idle-state";
529 local-timer-stop;
530 arm,psci-suspend-param = <0x1010000>;
531 entry-latency-us = <50>;
532 exit-latency-us = <100>;
533 min-residency-us = <270>;
534 wakeup-latency-us = <100>;
537 CPU_SLEEP_1_0: cpu-sleep-1-0 {
538 compatible = "arm,idle-state";
539 local-timer-stop;
540 arm,psci-suspend-param = <0x0010000>;
541 entry-latency-us = <70>;
542 exit-latency-us = <100>;
543 min-residency-us = <300>;
544 wakeup-latency-us = <150>;
547 CLUSTER_SLEEP_1: cluster-sleep-1 {
548 compatible = "arm,idle-state";
549 local-timer-stop;
550 arm,psci-suspend-param = <0x1010000>;
551 entry-latency-us = <500>;
552 exit-latency-us = <1200>;
553 min-residency-us = <3500>;
554 wakeup-latency-us = <1300>;
559 - |
560 // Example 2 (ARM 32-bit, 8-cpu system, two clusters):
563 #size-cells = <0>;
564 #address-cells = <1>;
568 compatible = "arm,cortex-a15";
570 cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
575 compatible = "arm,cortex-a15";
577 cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
582 compatible = "arm,cortex-a15";
584 cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
589 compatible = "arm,cortex-a15";
591 cpu-idle-states = <&cpu_sleep_0_0 &cluster_sleep_0>;
596 compatible = "arm,cortex-a7";
598 cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
603 compatible = "arm,cortex-a7";
605 cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
610 compatible = "arm,cortex-a7";
612 cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
617 compatible = "arm,cortex-a7";
619 cpu-idle-states = <&cpu_sleep_1_0 &cluster_sleep_1>;
622 idle-states {
623 cpu_sleep_0_0: cpu-sleep-0-0 {
624 compatible = "arm,idle-state";
625 local-timer-stop;
626 entry-latency-us = <200>;
627 exit-latency-us = <100>;
628 min-residency-us = <400>;
629 wakeup-latency-us = <250>;
632 cluster_sleep_0: cluster-sleep-0 {
633 compatible = "arm,idle-state";
634 local-timer-stop;
635 entry-latency-us = <500>;
636 exit-latency-us = <1500>;
637 min-residency-us = <2500>;
638 wakeup-latency-us = <1700>;
641 cpu_sleep_1_0: cpu-sleep-1-0 {
642 compatible = "arm,idle-state";
643 local-timer-stop;
644 entry-latency-us = <300>;
645 exit-latency-us = <500>;
646 min-residency-us = <900>;
647 wakeup-latency-us = <600>;
650 cluster_sleep_1: cluster-sleep-1 {
651 compatible = "arm,idle-state";
652 local-timer-stop;
653 entry-latency-us = <800>;
654 exit-latency-us = <2000>;
655 min-residency-us = <6500>;
656 wakeup-latency-us = <2300>;