Lines Matching full:states

19 Modern processors are generally able to enter states in which the execution of
21 memory or executed.  Those states are the *idle* states of the processor.
23 Since part of the processor hardware is not used in idle states, entering them
28 the idle states of processors for this purpose.
56 except for one have been put into idle states at the "core level" and the
75 larger unit are in idle states already).
90 Tasks can be in various states.  In particular, they are *runnable* if there are
104 code may cause the processor to be put into one of its idle states, if they are
106 idle states, or there is not enough time to spend in an idle state before the
108 available idle states from being used, the CPU will simply execute more or less
125 conditions at hand.  For this purpose, idle states that the hardware can be
138 the shallower idle states instead.  [The "depth" of an idle state roughly
176 hardcoded idle states information and the other able to read that information
207 for them to ask the hardware to enter idle states with target residencies above
210 exiting idle states due to the tick wakeups on idle CPUs will be wasted.
320 framework and the minimum of the two is taken as the limit for the idle states'
323 Now, the governor is ready to walk the list of idle states and choose one of
351 to correlate the observed idle duration values with the available idle states
391 The governor walks the list of idle states provided by the ``CPUIdle`` driver
398 (or if there are multiple shallower idle states with equal ``early_hits``
411 computed and the governor walks the idle states shallower than the preselected
426 .. _idle-states-representation:
428 Representation of Idle States
431 For the CPU idle time management purposes all of the physical idle states
436 cover a combination of idle states supported by the units at different levels of
473 discussed above, the objects representing idle states each contain a few other
548 selecting any idle states deeper than the disabled one too.]
559 objects representing combinations of idle states at different levels of the
573 states at different levels of the hierarchy of units in the processor,
576 much time has been spent by the hardware in different idle states supported by
657 the given CPU as the upper limit for the exit latency of the idle states that
659 states with exit latency beyond that limit.
662 Idle States Control Via Kernel Command Line
665 In addition to the ``sysfs`` interface allowing individual idle states to be
666 `disabled for individual CPUs <idle-states-representation_>`_, there are kernel
673 will ask the hardware to enter idle states on idle CPUs via the CPU architecture
706 P-states (see |cpufreq|) that require any number of CPUs in a package to be
714 ``MWAIT`` instruction of the CPUs to ask the hardware to enter idle states.
722 `Representation of Idle States <idle-states-representation_>`_), causes the
724 idle states deeper than idle state ``<n>``.  In that case, they will never ask
725 for any of those idle states or expose them to the governor.  [The behavior of