Lines Matching full:enter
19 Modern processors are generally able to enter states in which the execution of
44 enter an idle state, that applies to the processor as a whole.
52 enter an idle state, that applies to the core that asked for it in the first
57 remaining core asks the processor to enter an idle state, that may trigger it
69 time management perspective and if the processor is asked to enter an idle state
72 core also have asked the processor to enter an idle state. In that situation,
120 the CPU to ask the hardware to enter. Second, it invokes another code module
122 processor hardware to enter the idle state selected by the governor.
126 asked to enter by logical CPUs are represented in an abstract way independent of
136 spend in the given state, including the time needed to enter it (which may be
141 hardware to enter an idle state to start executing the first instruction after a
143 the time needed to enter the given state in case the wakeup occurs when the
151 CPU depends on can spend in an idle state, including the time necessary to enter
207 for them to ask the hardware to enter idle states with target residencies above
269 the CPU will ask the processor hardware to enter), it attempts to predict the
434 the processor hardware to enter an idle state of certain properties. If there
443 a "module" and suppose that asking the hardware to enter a specific idle state
445 enter a specific idle state of its own (say "MX") if the other core is in idle
452 the module (including the time needed to enter it), because that is the minimum
475 order to ask the hardware to enter that state. Also, for each
529 enter this idle state.
532 Total number of times a request to enter this idle state on the given
543 driver will never ask the hardware to enter it for that CPU as a result.
567 the kernel and it may not cover the cases in which the hardware refused to enter
569 enter any idle state at all). The kernel can only measure the time span between
570 asking the hardware to enter an idle state and the subsequent wakeup of the CPU
579 Generally, an interrupt received when trying to enter an idle state causes the
673 will ask the hardware to enter idle states on idle CPUs via the CPU architecture
700 and causes the hardware to attempt to enter the shallowest available idle state)
714 ``MWAIT`` instruction of the CPUs to ask the hardware to enter idle states.