Lines Matching refs:po
15 7. THE PROGRAM ORDER RELATION: po AND po-loc
325 THE PROGRAM ORDER RELATION: po AND po-loc
328 The most important relation between events is program order (po). You
333 that X is po-before Y (written as "X ->po Y" in formulas) if X occurs
337 on different CPUs are never linked by po. Also, it is by definition
340 po-loc is a sub-relation of po. It links two memory accesses when the
371 buf really is po-before its write event to flag, and similarly for the
488 have R ->po X. It wouldn't make sense for a computation to depend
587 Write-write coherence: If W ->po-loc W' (i.e., W comes before
591 Write-read coherence: If W ->po-loc R, where W is a store and R
595 Read-write coherence: If R ->po-loc W, where R is a load and W
599 Read-read coherence: If R ->po-loc R', where R and R' are two
674 Just like the po relation, co is inherently an ordering -- it is not
682 related by po. Coherence order is strictly per-location, or if you
752 uses the value of the po-latest such store as the value obtained by R,
785 the CPU to execute all po-earlier instructions before any
786 po-later instructions;
788 smp_rmb() forces the CPU to execute all po-earlier loads
789 before any po-later loads;
791 smp_wmb() forces the CPU to execute all po-earlier stores
792 before any po-later stores;
796 part of an smp_load_acquire()) before any po-later
800 execute all po-earlier instructions before the store
807 For each other CPU C', smp_wmb() forces all po-earlier stores
808 on C to propagate to C' before any po-later stores do.
811 a release fence is executed (including all po-earlier
816 executed (including all po-earlier stores on C) is forced to
817 propagate to all other CPUs before any instructions po-after
904 and po-loc relations agree with this global ordering; in other words,
905 whenever we have X ->rf Y or X ->co Y or X ->fr Y or X ->po-loc Y, the
913 where each of the links is either rf, co, fr, or po-loc. This has to
964 "preserved program order") relation, which links the po-earlier
965 instruction to the po-later instruction and is thus a sub-relation of
966 po.
970 memory accesses with X ->po Y; then the CPU must execute X before Y if
1023 store and a second, po-later load reads from that store:
1052 R ->po-loc W
1054 (the po-loc link says that R comes before W in program order and they
1060 W ->po-loc W'
1150 po-later instructions until after the local cache has finished
1172 the CPU to execute any po-later instructions (or po-later loads in the
1175 wait for all of its po-earlier stores to propagate to every other CPU
1545 that E ->po S and either S ->po F or S = F. In simple terms,
1546 there is a grace period po-between E and F.
1550 that E ->po U and either L ->po F or L = F. You can think of
1552 (in fact, it also allows E to be po-before the start of the
1553 critical section and F to be po-after the end).
1593 1. W is po-before G;
1595 2. X is equal to or po-after G;
1599 4. Y is po-before the end of C;
1601 5. Z is equal to or po-after the start of C.
1639 are events E and F where E is po-after L (which marks the start of the
1641 relation, and F is po-before the grace period S:
1643 L ->po E ->rcu-link F ->po S.
1649 some event X which is po-after S. Symbolically, this amounts to:
1651 S ->po X ->hb* Y ->fr W ->rf Z ->po U.
1658 S ->po X ->rcu-link Z ->po U.
1660 The formulas say that S is po-between F and X, hence F ->gp X. They
1821 all po-earlier events against all po-later events, as smp_mb() does,
1824 smp_mb__before_atomic() orders all po-earlier events against
1825 po-later atomic updates and the events following them;
1827 smp_mb__after_atomic() orders po-earlier atomic updates and
1828 the events preceding them against all po-later events;
1830 smp_mb_after_spinlock() orders po-earlier lock acquisition
1831 events and the events preceding them against all po-later