261 	reg = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D3()
263 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D3()
266 	val = readl(sst->addr.pci_cfg + SST_VDRTCTL0);  in hsw_set_dsp_D3()
270 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL0);  in hsw_set_dsp_D3()
273 	val = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D3()
275 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D3()
282 	val = readl(sst->addr.pci_cfg + SST_PMCS);  in hsw_set_dsp_D3()
284 	writel(val, sst->addr.pci_cfg + SST_PMCS);  in hsw_set_dsp_D3()
288 	reg = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D3()
290 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D3()
317 	reg = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D0()
319 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D0()
322 	reg = readl(sst->addr.pci_cfg + SST_VDRTCTL0);  in hsw_set_dsp_D0()
324 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL0);  in hsw_set_dsp_D0()
327 	reg = readl(sst->addr.pci_cfg + SST_PMCS);  in hsw_set_dsp_D0()
329 	writel(reg, sst->addr.pci_cfg + SST_PMCS);  in hsw_set_dsp_D0()
333 		reg = readl(sst->addr.pci_cfg + SST_PMCS) & SST_PMCS_PS_MASK;  in hsw_set_dsp_D0()
361 	reg = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D0()
363 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D0()
368 	reg = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D0()
370 	writel(reg, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_set_dsp_D0()
374 	reg = readl(sst->addr.pci_cfg + SST_VDRTCTL0);  in hsw_set_dsp_D0()
378 	writel(reg & ~fw_dump_bit, sst->addr.pci_cfg + SST_VDRTCTL0);  in hsw_set_dsp_D0()
480 	sst->addr.pci_cfg = ioremap(pdata->pcicfg_base, pdata->pcicfg_size);  in hsw_acpi_resource_map()
481 	if (!sst->addr.pci_cfg) {  in hsw_acpi_resource_map()
555 	val = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_block_enable()
557 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_block_enable()
559 	val = readl(sst->addr.pci_cfg + SST_VDRTCTL0);  in hsw_block_enable()
561 	writel(val & ~bit, sst->addr.pci_cfg + SST_VDRTCTL0);  in hsw_block_enable()
567 	val = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_block_enable()
569 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_block_enable()
591 	val = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_block_disable()
593 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_block_disable()
596 	val = readl(sst->addr.pci_cfg + SST_VDRTCTL0);  in hsw_block_disable()
600 		writel(val | bit, sst->addr.pci_cfg + SST_VDRTCTL0);  in hsw_block_disable()
606 	val = readl(sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_block_disable()
608 	writel(val, sst->addr.pci_cfg + SST_VDRTCTL2);  in hsw_block_disable()
686 	writel(0xffffffff & ~fw_dump_bit, sst->addr.pci_cfg + SST_VDRTCTL0);  in hsw_init()
695 	iounmap(sst->addr.pci_cfg);  in hsw_free()