379 #define HDSPM_SyncRefMask    (HDSPM_SyncRef0|HDSPM_SyncRef1|\
517 #define HDSPM_SyncRef0 0x10000  /* Sync Reference */  macro
2717 		case HDSPM_SyncRef0: return 1; /* AES 1 */  in hdspm_pref_sync_ref()
2719 		case HDSPM_SyncRef1+HDSPM_SyncRef0: return 3; /* AES 3 */  in hdspm_pref_sync_ref()
2721 		case HDSPM_SyncRef2+HDSPM_SyncRef0: return 5; /* AES 5 */  in hdspm_pref_sync_ref()
2723 		case HDSPM_SyncRef2+HDSPM_SyncRef1+HDSPM_SyncRef0:  in hdspm_pref_sync_ref()
2726 		case HDSPM_SyncRef3+HDSPM_SyncRef0: return 9; /* TCO */  in hdspm_pref_sync_ref()
2735 			case HDSPM_SyncRef0: return 1;  /* MADI */  in hdspm_pref_sync_ref()
2737 			case HDSPM_SyncRef1+HDSPM_SyncRef0:  in hdspm_pref_sync_ref()
2743 			case HDSPM_SyncRef0: return 1;  /* MADI */  in hdspm_pref_sync_ref()
2744 			case HDSPM_SyncRef1+HDSPM_SyncRef0:  in hdspm_pref_sync_ref()
2825 			hdspm->control_register |= HDSPM_SyncRef0;  in hdspm_set_pref_sync_ref()
2832 				HDSPM_SyncRef1+HDSPM_SyncRef0;  in hdspm_set_pref_sync_ref()
2839 				HDSPM_SyncRef2+HDSPM_SyncRef0;  in hdspm_set_pref_sync_ref()
2847 				HDSPM_SyncRef2+HDSPM_SyncRef1+HDSPM_SyncRef0;  in hdspm_set_pref_sync_ref()
2854 				HDSPM_SyncRef3+HDSPM_SyncRef0;  in hdspm_set_pref_sync_ref()
2870 				hdspm->control_register |= HDSPM_SyncRef0;  in hdspm_set_pref_sync_ref()
2877 					HDSPM_SyncRef0+HDSPM_SyncRef1;  in hdspm_set_pref_sync_ref()
2887 				hdspm->control_register |= HDSPM_SyncRef0;  in hdspm_set_pref_sync_ref()
2891 					HDSPM_SyncRef0+HDSPM_SyncRef1;  in hdspm_set_pref_sync_ref()
5365 			HDSPM_SyncRef0 |	/* AES1 is syncclock */  in snd_hdspm_set_defaults()