36 	struct snd_wm8766 wm8766;  member
120 	struct psc724_spec *spec = container_of(wm, struct psc724_spec, wm8766);  in psc724_wm8766_write()
339 	spec->wm8766.ctl[WM8766_CTL_CH1_VOL].name = rear_volume;  in psc724_add_controls()
340 	spec->wm8766.ctl[WM8766_CTL_CH2_VOL].name = clfe_volume;  in psc724_add_controls()
341 	spec->wm8766.ctl[WM8766_CTL_CH3_VOL].name = NULL;  in psc724_add_controls()
342 	spec->wm8766.ctl[WM8766_CTL_CH1_SW].name = rear_switch;  in psc724_add_controls()
343 	spec->wm8766.ctl[WM8766_CTL_CH2_SW].name = clfe_switch;  in psc724_add_controls()
344 	spec->wm8766.ctl[WM8766_CTL_CH3_SW].name = NULL;  in psc724_add_controls()
345 	spec->wm8766.ctl[WM8766_CTL_PHASE1_SW].name = rear_phase;  in psc724_add_controls()
346 	spec->wm8766.ctl[WM8766_CTL_PHASE2_SW].name = clfe_phase;  in psc724_add_controls()
347 	spec->wm8766.ctl[WM8766_CTL_PHASE3_SW].name = NULL;  in psc724_add_controls()
348 	spec->wm8766.ctl[WM8766_CTL_DEEMPH1_SW].name = rear_deemph;  in psc724_add_controls()
349 	spec->wm8766.ctl[WM8766_CTL_DEEMPH2_SW].name = clfe_deemph;  in psc724_add_controls()
350 	spec->wm8766.ctl[WM8766_CTL_DEEMPH3_SW].name = NULL;  in psc724_add_controls()
351 	spec->wm8766.ctl[WM8766_CTL_IZD_SW].name = rear_clfe_izd;  in psc724_add_controls()
352 	spec->wm8766.ctl[WM8766_CTL_ZC_SW].name = rear_clfe_zc;  in psc724_add_controls()
353 	snd_wm8766_build_controls(&spec->wm8766);  in psc724_add_controls()
380 	snd_wm8766_volume_restore(&spec->wm8766);  in psc724_set_pro_rate()
391 	snd_wm8766_resume(&spec->wm8766);  in psc724_resume()
414 	spec->wm8766.ops.write = psc724_wm8766_write;  in psc724_init()
415 	spec->wm8766.card = ice->card;  in psc724_init()
420 	snd_wm8766_init(&spec->wm8766);  in psc724_init()
421 	snd_wm8766_set_if(&spec->wm8766,  in psc724_init()