Lines Matching refs:BA0_MIDCR
286 #define BA0_MIDCR 0x0490 /* MIDI Control */ macro
1648 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr | BA0_MIDCR_MRST); in snd_cs4281_midi_reset()
1650 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_reset()
1663 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_open()
1679 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_close()
1697 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_open()
1713 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_close()
1729 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_trigger()
1734 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_input_trigger()
1759 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_trigger()
1764 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_midi_output_trigger()
1860 snd_cs4281_pokeBA0(chip, BA0_MIDCR, chip->midcr); in snd_cs4281_interrupt()
1983 BA0_MIDCR,