25 void snd_hdac_stream_init(struct hdac_bus *bus, struct hdac_stream *azx_dev,  in snd_hdac_stream_init()  argument
28 	azx_dev->bus = bus;  in snd_hdac_stream_init()
30 	azx_dev->sd_addr = bus->remap_addr + (0x20 * idx + 0x80);  in snd_hdac_stream_init()
32 	azx_dev->sd_int_sta_mask = 1 << idx;  in snd_hdac_stream_init()
33 	azx_dev->index = idx;  in snd_hdac_stream_init()
34 	azx_dev->direction = direction;  in snd_hdac_stream_init()
35 	azx_dev->stream_tag = tag;  in snd_hdac_stream_init()
36 	snd_hdac_dsp_lock_init(azx_dev);  in snd_hdac_stream_init()
37 	list_add_tail(&azx_dev->list, &bus->stream_list);  in snd_hdac_stream_init()
48 void snd_hdac_stream_start(struct hdac_stream *azx_dev, bool fresh_start)  in snd_hdac_stream_start()  argument
50 	struct hdac_bus *bus = azx_dev->bus;  in snd_hdac_stream_start()
52 	trace_snd_hdac_stream_start(bus, azx_dev);  in snd_hdac_stream_start()
54 	azx_dev->start_wallclk = snd_hdac_chip_readl(bus, WALLCLK);  in snd_hdac_stream_start()
56 		azx_dev->start_wallclk -= azx_dev->period_wallclk;  in snd_hdac_stream_start()
59 	snd_hdac_chip_updatel(bus, INTCTL, 0, 1 << azx_dev->index);  in snd_hdac_stream_start()
61 	snd_hdac_stream_updateb(azx_dev, SD_CTL,  in snd_hdac_stream_start()
63 	azx_dev->running = true;  in snd_hdac_stream_start()
71 void snd_hdac_stream_clear(struct hdac_stream *azx_dev)  in snd_hdac_stream_clear()  argument
73 	snd_hdac_stream_updateb(azx_dev, SD_CTL,  in snd_hdac_stream_clear()
75 	snd_hdac_stream_writeb(azx_dev, SD_STS, SD_INT_MASK); /* to be sure */  in snd_hdac_stream_clear()
76 	azx_dev->running = false;  in snd_hdac_stream_clear()
86 void snd_hdac_stream_stop(struct hdac_stream *azx_dev)  in snd_hdac_stream_stop()  argument
88 	trace_snd_hdac_stream_stop(azx_dev->bus, azx_dev);  in snd_hdac_stream_stop()
90 	snd_hdac_stream_clear(azx_dev);  in snd_hdac_stream_stop()
92 	snd_hdac_chip_updatel(azx_dev->bus, INTCTL, 1 << azx_dev->index, 0);  in snd_hdac_stream_stop()
100 void snd_hdac_stream_reset(struct hdac_stream *azx_dev)  in snd_hdac_stream_reset()  argument
105 	snd_hdac_stream_clear(azx_dev);  in snd_hdac_stream_reset()
107 	snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET);  in snd_hdac_stream_reset()
111 		val = snd_hdac_stream_readb(azx_dev, SD_CTL) &  in snd_hdac_stream_reset()
117 	snd_hdac_stream_writeb(azx_dev, SD_CTL, val);  in snd_hdac_stream_reset()
123 		val = snd_hdac_stream_readb(azx_dev, SD_CTL) &  in snd_hdac_stream_reset()
130 	if (azx_dev->posbuf)  in snd_hdac_stream_reset()
131 		*azx_dev->posbuf = 0;  in snd_hdac_stream_reset()
139 int snd_hdac_stream_setup(struct hdac_stream *azx_dev)  in snd_hdac_stream_setup()  argument
141 	struct hdac_bus *bus = azx_dev->bus;  in snd_hdac_stream_setup()
145 	if (azx_dev->substream)  in snd_hdac_stream_setup()
146 		runtime = azx_dev->substream->runtime;  in snd_hdac_stream_setup()
150 	snd_hdac_stream_clear(azx_dev);  in snd_hdac_stream_setup()
152 	val = snd_hdac_stream_readl(azx_dev, SD_CTL);  in snd_hdac_stream_setup()
154 		(azx_dev->stream_tag << SD_CTL_STREAM_TAG_SHIFT);  in snd_hdac_stream_setup()
157 	snd_hdac_stream_writel(azx_dev, SD_CTL, val);  in snd_hdac_stream_setup()
160 	snd_hdac_stream_writel(azx_dev, SD_CBL, azx_dev->bufsize);  in snd_hdac_stream_setup()
164 	snd_hdac_stream_writew(azx_dev, SD_FORMAT, azx_dev->format_val);  in snd_hdac_stream_setup()
167 	snd_hdac_stream_writew(azx_dev, SD_LVI, azx_dev->frags - 1);  in snd_hdac_stream_setup()
171 	snd_hdac_stream_writel(azx_dev, SD_BDLPL, (u32)azx_dev->bdl.addr);  in snd_hdac_stream_setup()
173 	snd_hdac_stream_writel(azx_dev, SD_BDLPU,  in snd_hdac_stream_setup()
174 			       upper_32_bits(azx_dev->bdl.addr));  in snd_hdac_stream_setup()
184 	snd_hdac_stream_updatel(azx_dev, SD_CTL, 0, SD_INT_MASK);  in snd_hdac_stream_setup()
186 	if (azx_dev->direction == SNDRV_PCM_STREAM_PLAYBACK)  in snd_hdac_stream_setup()
187 		azx_dev->fifo_size =  in snd_hdac_stream_setup()
188 			snd_hdac_stream_readw(azx_dev, SD_FIFOSIZE) + 1;  in snd_hdac_stream_setup()
190 		azx_dev->fifo_size = 0;  in snd_hdac_stream_setup()
197 		azx_dev->delay_negative_threshold =  in snd_hdac_stream_setup()
200 		azx_dev->delay_negative_threshold = 0;  in snd_hdac_stream_setup()
204 		azx_dev->period_wallclk = (((runtime->period_size * 24000) /  in snd_hdac_stream_setup()
215 void snd_hdac_stream_cleanup(struct hdac_stream *azx_dev)  in snd_hdac_stream_cleanup()  argument
217 	snd_hdac_stream_writel(azx_dev, SD_BDLPL, 0);  in snd_hdac_stream_cleanup()
218 	snd_hdac_stream_writel(azx_dev, SD_BDLPU, 0);  in snd_hdac_stream_cleanup()
219 	snd_hdac_stream_writel(azx_dev, SD_CTL, 0);  in snd_hdac_stream_cleanup()
220 	azx_dev->bufsize = 0;  in snd_hdac_stream_cleanup()
221 	azx_dev->period_bytes = 0;  in snd_hdac_stream_cleanup()
222 	azx_dev->format_val = 0;  in snd_hdac_stream_cleanup()
240 	struct hdac_stream *azx_dev;  in snd_hdac_stream_assign()  local
247 	list_for_each_entry(azx_dev, &bus->stream_list, list) {  in snd_hdac_stream_assign()
248 		if (azx_dev->direction != substream->stream)  in snd_hdac_stream_assign()
250 		if (azx_dev->opened)  in snd_hdac_stream_assign()
252 		if (azx_dev->assigned_key == key) {  in snd_hdac_stream_assign()
253 			res = azx_dev;  in snd_hdac_stream_assign()
257 			res = azx_dev;  in snd_hdac_stream_assign()
277 void snd_hdac_stream_release(struct hdac_stream *azx_dev)  in snd_hdac_stream_release()  argument
279 	struct hdac_bus *bus = azx_dev->bus;  in snd_hdac_stream_release()
282 	azx_dev->opened = 0;  in snd_hdac_stream_release()
283 	azx_dev->running = 0;  in snd_hdac_stream_release()
284 	azx_dev->substream = NULL;  in snd_hdac_stream_release()
316 		      struct hdac_stream *azx_dev, __le32 **bdlp,  in setup_bdle()  argument
325 		if (azx_dev->frags >= AZX_MAX_BDL_ENTRIES)  in setup_bdle()
348 		azx_dev->frags++;  in setup_bdle()
362 int snd_hdac_stream_setup_periods(struct hdac_stream *azx_dev)  in snd_hdac_stream_setup_periods()  argument
364 	struct hdac_bus *bus = azx_dev->bus;  in snd_hdac_stream_setup_periods()
365 	struct snd_pcm_substream *substream = azx_dev->substream;  in snd_hdac_stream_setup_periods()
372 	snd_hdac_stream_writel(azx_dev, SD_BDLPL, 0);  in snd_hdac_stream_setup_periods()
373 	snd_hdac_stream_writel(azx_dev, SD_BDLPU, 0);  in snd_hdac_stream_setup_periods()
375 	period_bytes = azx_dev->period_bytes;  in snd_hdac_stream_setup_periods()
376 	periods = azx_dev->bufsize / period_bytes;  in snd_hdac_stream_setup_periods()
379 	bdl = (__le32 *)azx_dev->bdl.area;  in snd_hdac_stream_setup_periods()
381 	azx_dev->frags = 0;  in snd_hdac_stream_setup_periods()
384 	if (!azx_dev->no_period_wakeup && pos_adj > 0) {  in snd_hdac_stream_setup_periods()
399 					 azx_dev,  in snd_hdac_stream_setup_periods()
410 					 azx_dev, &bdl, ofs,  in snd_hdac_stream_setup_periods()
414 					 azx_dev, &bdl, ofs,  in snd_hdac_stream_setup_periods()
416 					 !azx_dev->no_period_wakeup);  in snd_hdac_stream_setup_periods()
424 		azx_dev->bufsize, period_bytes);  in snd_hdac_stream_setup_periods()
437 int snd_hdac_stream_set_params(struct hdac_stream *azx_dev,  in snd_hdac_stream_set_params()  argument
442 	struct snd_pcm_substream *substream = azx_dev->substream;  in snd_hdac_stream_set_params()
452 	if (bufsize != azx_dev->bufsize ||  in snd_hdac_stream_set_params()
453 	    period_bytes != azx_dev->period_bytes ||  in snd_hdac_stream_set_params()
454 	    format_val != azx_dev->format_val ||  in snd_hdac_stream_set_params()
455 	    runtime->no_period_wakeup != azx_dev->no_period_wakeup) {  in snd_hdac_stream_set_params()
456 		azx_dev->bufsize = bufsize;  in snd_hdac_stream_set_params()
457 		azx_dev->period_bytes = period_bytes;  in snd_hdac_stream_set_params()
458 		azx_dev->format_val = format_val;  in snd_hdac_stream_set_params()
459 		azx_dev->no_period_wakeup = runtime->no_period_wakeup;  in snd_hdac_stream_set_params()
460 		err = snd_hdac_stream_setup_periods(azx_dev);  in snd_hdac_stream_set_params()
470 	struct hdac_stream *azx_dev = container_of(cc, struct hdac_stream, cc);  in azx_cc_read()  local
472 	return snd_hdac_chip_readl(azx_dev->bus, WALLCLK);  in azx_cc_read()
475 static void azx_timecounter_init(struct hdac_stream *azx_dev,  in azx_timecounter_init()  argument
478 	struct timecounter *tc = &azx_dev->tc;  in azx_timecounter_init()
479 	struct cyclecounter *cc = &azx_dev->cc;  in azx_timecounter_init()
519 void snd_hdac_stream_timecounter_init(struct hdac_stream *azx_dev,  in snd_hdac_stream_timecounter_init()  argument
522 	struct hdac_bus *bus = azx_dev->bus;  in snd_hdac_stream_timecounter_init()
523 	struct snd_pcm_runtime *runtime = azx_dev->substream->runtime;  in snd_hdac_stream_timecounter_init()
550 void snd_hdac_stream_sync_trigger(struct hdac_stream *azx_dev, bool set,  in snd_hdac_stream_sync_trigger()  argument
553 	struct hdac_bus *bus = azx_dev->bus;  in snd_hdac_stream_sync_trigger()
576 void snd_hdac_stream_sync(struct hdac_stream *azx_dev, bool start,  in snd_hdac_stream_sync()  argument
579 	struct hdac_bus *bus = azx_dev->bus;  in snd_hdac_stream_sync()
620 int snd_hdac_dsp_prepare(struct hdac_stream *azx_dev, unsigned int format,  in snd_hdac_dsp_prepare()  argument
623 	struct hdac_bus *bus = azx_dev->bus;  in snd_hdac_dsp_prepare()
627 	snd_hdac_dsp_lock(azx_dev);  in snd_hdac_dsp_prepare()
629 	if (azx_dev->running || azx_dev->locked) {  in snd_hdac_dsp_prepare()
634 	azx_dev->locked = true;  in snd_hdac_dsp_prepare()
642 	azx_dev->substream = NULL;  in snd_hdac_dsp_prepare()
643 	azx_dev->bufsize = byte_size;  in snd_hdac_dsp_prepare()
644 	azx_dev->period_bytes = byte_size;  in snd_hdac_dsp_prepare()
645 	azx_dev->format_val = format;  in snd_hdac_dsp_prepare()
647 	snd_hdac_stream_reset(azx_dev);  in snd_hdac_dsp_prepare()
650 	snd_hdac_stream_writel(azx_dev, SD_BDLPL, 0);  in snd_hdac_dsp_prepare()
651 	snd_hdac_stream_writel(azx_dev, SD_BDLPU, 0);  in snd_hdac_dsp_prepare()
653 	azx_dev->frags = 0;  in snd_hdac_dsp_prepare()
654 	bdl = (__le32 *)azx_dev->bdl.area;  in snd_hdac_dsp_prepare()
655 	err = setup_bdle(bus, bufp, azx_dev, &bdl, 0, byte_size, 0);  in snd_hdac_dsp_prepare()
659 	snd_hdac_stream_setup(azx_dev);  in snd_hdac_dsp_prepare()
660 	snd_hdac_dsp_unlock(azx_dev);  in snd_hdac_dsp_prepare()
661 	return azx_dev->stream_tag;  in snd_hdac_dsp_prepare()
667 	azx_dev->locked = false;  in snd_hdac_dsp_prepare()
670 	snd_hdac_dsp_unlock(azx_dev);  in snd_hdac_dsp_prepare()
680 void snd_hdac_dsp_trigger(struct hdac_stream *azx_dev, bool start)  in snd_hdac_dsp_trigger()  argument
683 		snd_hdac_stream_start(azx_dev, true);  in snd_hdac_dsp_trigger()
685 		snd_hdac_stream_stop(azx_dev);  in snd_hdac_dsp_trigger()
694 void snd_hdac_dsp_cleanup(struct hdac_stream *azx_dev,  in snd_hdac_dsp_cleanup()  argument
697 	struct hdac_bus *bus = azx_dev->bus;  in snd_hdac_dsp_cleanup()
699 	if (!dmab->area || !azx_dev->locked)  in snd_hdac_dsp_cleanup()
702 	snd_hdac_dsp_lock(azx_dev);  in snd_hdac_dsp_cleanup()
704 	snd_hdac_stream_writel(azx_dev, SD_BDLPL, 0);  in snd_hdac_dsp_cleanup()
705 	snd_hdac_stream_writel(azx_dev, SD_BDLPU, 0);  in snd_hdac_dsp_cleanup()
706 	snd_hdac_stream_writel(azx_dev, SD_CTL, 0);  in snd_hdac_dsp_cleanup()
707 	azx_dev->bufsize = 0;  in snd_hdac_dsp_cleanup()
708 	azx_dev->period_bytes = 0;  in snd_hdac_dsp_cleanup()
709 	azx_dev->format_val = 0;  in snd_hdac_dsp_cleanup()
715 	azx_dev->locked = false;  in snd_hdac_dsp_cleanup()
717 	snd_hdac_dsp_unlock(azx_dev);  in snd_hdac_dsp_cleanup()