Lines Matching refs:index
65 #define MTTY_VFIO_PCI_INDEX_TO_OFFSET(index) \ argument
66 ((u64)(index) << MTTY_VFIO_PCI_OFFSET_SHIFT)
306 static void handle_bar_write(unsigned int index, struct mdev_state *mdev_state, in handle_bar_write() argument
315 if (mdev_state->s[index].dlab) { in handle_bar_write()
316 mdev_state->s[index].divisor |= data; in handle_bar_write()
323 if (mdev_state->s[index].rxtx.count < in handle_bar_write()
324 mdev_state->s[index].max_fifo_size) { in handle_bar_write()
325 mdev_state->s[index].rxtx.fifo[ in handle_bar_write()
326 mdev_state->s[index].rxtx.head] = data; in handle_bar_write()
327 mdev_state->s[index].rxtx.count++; in handle_bar_write()
328 CIRCULAR_BUF_INC_IDX(mdev_state->s[index].rxtx.head); in handle_bar_write()
329 mdev_state->s[index].overrun = false; in handle_bar_write()
335 if ((mdev_state->s[index].uart_reg[UART_IER] & in handle_bar_write()
337 (mdev_state->s[index].rxtx.count == in handle_bar_write()
338 mdev_state->s[index].intr_trigger_level)) { in handle_bar_write()
342 index); in handle_bar_write()
349 pr_err("Serial port %d: Buffer Overflow\n", index); in handle_bar_write()
351 mdev_state->s[index].overrun = true; in handle_bar_write()
357 if (mdev_state->s[index].uart_reg[UART_IER] & in handle_bar_write()
367 if (mdev_state->s[index].dlab) in handle_bar_write()
368 mdev_state->s[index].divisor |= (u16)data << 8; in handle_bar_write()
370 mdev_state->s[index].uart_reg[offset] = data; in handle_bar_write()
373 (mdev_state->s[index].rxtx.head == in handle_bar_write()
374 mdev_state->s[index].rxtx.tail)) { in handle_bar_write()
377 index); in handle_bar_write()
389 mdev_state->s[index].fcr = data; in handle_bar_write()
394 mdev_state->s[index].rxtx.count = 0; in handle_bar_write()
395 mdev_state->s[index].rxtx.head = 0; in handle_bar_write()
396 mdev_state->s[index].rxtx.tail = 0; in handle_bar_write()
402 mdev_state->s[index].intr_trigger_level = 1; in handle_bar_write()
406 mdev_state->s[index].intr_trigger_level = 4; in handle_bar_write()
410 mdev_state->s[index].intr_trigger_level = 8; in handle_bar_write()
414 mdev_state->s[index].intr_trigger_level = 14; in handle_bar_write()
423 mdev_state->s[index].intr_trigger_level = 1; in handle_bar_write()
425 mdev_state->s[index].max_fifo_size = MAX_FIFO_SIZE; in handle_bar_write()
427 mdev_state->s[index].max_fifo_size = 1; in handle_bar_write()
428 mdev_state->s[index].intr_trigger_level = 1; in handle_bar_write()
435 mdev_state->s[index].dlab = true; in handle_bar_write()
436 mdev_state->s[index].divisor = 0; in handle_bar_write()
438 mdev_state->s[index].dlab = false; in handle_bar_write()
440 mdev_state->s[index].uart_reg[offset] = data; in handle_bar_write()
444 mdev_state->s[index].uart_reg[offset] = data; in handle_bar_write()
446 if ((mdev_state->s[index].uart_reg[UART_IER] & UART_IER_MSI) && in handle_bar_write()
449 pr_err("Serial port %d: MCR_OUT2 write\n", index); in handle_bar_write()
454 if ((mdev_state->s[index].uart_reg[UART_IER] & UART_IER_MSI) && in handle_bar_write()
457 pr_err("Serial port %d: MCR RTS/DTR write\n", index); in handle_bar_write()
469 mdev_state->s[index].uart_reg[offset] = data; in handle_bar_write()
477 static void handle_bar_read(unsigned int index, struct mdev_state *mdev_state, in handle_bar_read() argument
484 if (mdev_state->s[index].dlab) { in handle_bar_read()
485 *buf = (u8)mdev_state->s[index].divisor; in handle_bar_read()
491 if (mdev_state->s[index].rxtx.head != in handle_bar_read()
492 mdev_state->s[index].rxtx.tail) { in handle_bar_read()
493 *buf = mdev_state->s[index].rxtx.fifo[ in handle_bar_read()
494 mdev_state->s[index].rxtx.tail]; in handle_bar_read()
495 mdev_state->s[index].rxtx.count--; in handle_bar_read()
496 CIRCULAR_BUF_INC_IDX(mdev_state->s[index].rxtx.tail); in handle_bar_read()
499 if (mdev_state->s[index].rxtx.head == in handle_bar_read()
500 mdev_state->s[index].rxtx.tail) { in handle_bar_read()
506 pr_err("Serial port %d: Buffer Empty\n", index); in handle_bar_read()
508 if (mdev_state->s[index].uart_reg[UART_IER] & in handle_bar_read()
518 if (mdev_state->s[index].dlab) { in handle_bar_read()
519 *buf = (u8)(mdev_state->s[index].divisor >> 8); in handle_bar_read()
522 *buf = mdev_state->s[index].uart_reg[offset] & 0x0f; in handle_bar_read()
527 u8 ier = mdev_state->s[index].uart_reg[UART_IER]; in handle_bar_read()
532 if ((ier & UART_IER_RLSI) && mdev_state->s[index].overrun) in handle_bar_read()
537 (mdev_state->s[index].rxtx.count >= in handle_bar_read()
538 mdev_state->s[index].intr_trigger_level)) in handle_bar_read()
543 (mdev_state->s[index].rxtx.head == in handle_bar_read()
544 mdev_state->s[index].rxtx.tail)) in handle_bar_read()
549 (mdev_state->s[index].uart_reg[UART_MCR] & in handle_bar_read()
565 *buf = mdev_state->s[index].uart_reg[offset]; in handle_bar_read()
574 if (mdev_state->s[index].rxtx.head != in handle_bar_read()
575 mdev_state->s[index].rxtx.tail) in handle_bar_read()
579 if (mdev_state->s[index].overrun) in handle_bar_read()
583 if (mdev_state->s[index].rxtx.head == in handle_bar_read()
584 mdev_state->s[index].rxtx.tail) in handle_bar_read()
596 if (mdev_state->s[index].uart_reg[UART_MCR] & in handle_bar_read()
598 if (mdev_state->s[index].rxtx.count < in handle_bar_read()
599 mdev_state->s[index].max_fifo_size) in handle_bar_read()
608 *buf = mdev_state->s[index].uart_reg[offset]; in handle_bar_read()
618 int index, pos; in mdev_read_base() local
624 for (index = 0; index <= VFIO_PCI_BAR5_REGION_INDEX; index++) { in mdev_read_base()
626 if (!mdev_state->region_info[index].size) in mdev_read_base()
648 mdev_state->region_info[index].start = ((u64)start_hi << 32) | in mdev_read_base()
657 unsigned int index; in mdev_access() local
672 index = MTTY_VFIO_PCI_OFFSET_TO_INDEX(pos); in mdev_access()
674 switch (index) { in mdev_access()
692 if (!mdev_state->region_info[index].start) in mdev_access()
700 __func__, index, offset, wr_reg[offset], in mdev_access()
701 (u8)*buf, mdev_state->s[index].dlab); in mdev_access()
703 handle_bar_write(index, mdev_state, offset, buf, count); in mdev_access()
705 handle_bar_read(index, mdev_state, offset, buf, count); in mdev_access()
710 __func__, index, offset, rd_reg[offset], in mdev_access()
711 (u8)*buf, mdev_state->s[index].dlab); in mdev_access()
935 unsigned int index, unsigned int start, in mtty_set_irqs() argument
949 switch (index) { in mtty_set_irqs()
977 mdev_state->irq_index = index; in mtty_set_irqs()
1015 mdev_state->irq_index = index; in mtty_set_irqs()
1085 bar_index = region_info->index; in mtty_get_region_info()
1121 switch (irq_info->index) { in mtty_get_irq_info()
1134 if (irq_info->index == VFIO_PCI_INTX_IRQ_INDEX) in mtty_get_irq_info()
1226 (info.index >= mdev_state->dev_info.num_irqs)) in mtty_ioctl()
1263 ret = mtty_set_irqs(mdev, hdr.flags, hdr.index, hdr.start, in mtty_ioctl()