Lines Matching refs:R4
50 #define R4 BPF_REG_4 macro
1190 BPF_ALU64_IMM(BPF_MOV, R4, 4),
1200 BPF_ALU64_IMM(BPF_ADD, R4, 20),
1210 BPF_ALU64_IMM(BPF_SUB, R4, 10),
1220 BPF_ALU64_REG(BPF_ADD, R0, R4),
1232 BPF_ALU64_REG(BPF_ADD, R1, R4),
1244 BPF_ALU64_REG(BPF_ADD, R2, R4),
1256 BPF_ALU64_REG(BPF_ADD, R3, R4),
1264 BPF_ALU64_REG(BPF_ADD, R4, R0),
1265 BPF_ALU64_REG(BPF_ADD, R4, R1),
1266 BPF_ALU64_REG(BPF_ADD, R4, R2),
1267 BPF_ALU64_REG(BPF_ADD, R4, R3),
1268 BPF_ALU64_REG(BPF_ADD, R4, R4),
1269 BPF_ALU64_REG(BPF_ADD, R4, R5),
1270 BPF_ALU64_REG(BPF_ADD, R4, R6),
1271 BPF_ALU64_REG(BPF_ADD, R4, R7),
1272 BPF_ALU64_REG(BPF_ADD, R4, R8),
1273 BPF_ALU64_REG(BPF_ADD, R4, R9), /* R4 == 12177 */
1274 BPF_JMP_IMM(BPF_JEQ, R4, 12177, 1),
1280 BPF_ALU64_REG(BPF_ADD, R5, R4),
1292 BPF_ALU64_REG(BPF_ADD, R6, R4),
1304 BPF_ALU64_REG(BPF_ADD, R7, R4),
1316 BPF_ALU64_REG(BPF_ADD, R8, R4),
1328 BPF_ALU64_REG(BPF_ADD, R9, R4),
1348 BPF_ALU32_IMM(BPF_MOV, R4, 4),
1357 BPF_ALU64_IMM(BPF_ADD, R4, 10),
1366 BPF_ALU32_REG(BPF_ADD, R0, R4),
1378 BPF_ALU32_REG(BPF_ADD, R1, R4),
1390 BPF_ALU32_REG(BPF_ADD, R2, R4),
1402 BPF_ALU32_REG(BPF_ADD, R3, R4),
1410 BPF_ALU32_REG(BPF_ADD, R4, R0),
1411 BPF_ALU32_REG(BPF_ADD, R4, R1),
1412 BPF_ALU32_REG(BPF_ADD, R4, R2),
1413 BPF_ALU32_REG(BPF_ADD, R4, R3),
1414 BPF_ALU32_REG(BPF_ADD, R4, R4),
1415 BPF_ALU32_REG(BPF_ADD, R4, R5),
1416 BPF_ALU32_REG(BPF_ADD, R4, R6),
1417 BPF_ALU32_REG(BPF_ADD, R4, R7),
1418 BPF_ALU32_REG(BPF_ADD, R4, R8),
1419 BPF_ALU32_REG(BPF_ADD, R4, R9), /* R4 == 12177 */
1420 BPF_JMP_IMM(BPF_JEQ, R4, 12177, 1),
1426 BPF_ALU32_REG(BPF_ADD, R5, R4),
1438 BPF_ALU32_REG(BPF_ADD, R6, R4),
1450 BPF_ALU32_REG(BPF_ADD, R7, R4),
1462 BPF_ALU32_REG(BPF_ADD, R8, R4),
1474 BPF_ALU32_REG(BPF_ADD, R9, R4),
1494 BPF_ALU64_IMM(BPF_MOV, R4, 4),
1504 BPF_ALU64_REG(BPF_SUB, R0, R4),
1516 BPF_ALU64_REG(BPF_SUB, R1, R4),
1526 BPF_ALU64_REG(BPF_SUB, R2, R4),
1536 BPF_ALU64_REG(BPF_SUB, R3, R4),
1543 BPF_ALU64_REG(BPF_SUB, R4, R0),
1544 BPF_ALU64_REG(BPF_SUB, R4, R1),
1545 BPF_ALU64_REG(BPF_SUB, R4, R2),
1546 BPF_ALU64_REG(BPF_SUB, R4, R3),
1547 BPF_ALU64_REG(BPF_SUB, R4, R5),
1548 BPF_ALU64_REG(BPF_SUB, R4, R6),
1549 BPF_ALU64_REG(BPF_SUB, R4, R7),
1550 BPF_ALU64_REG(BPF_SUB, R4, R8),
1551 BPF_ALU64_REG(BPF_SUB, R4, R9),
1552 BPF_ALU64_IMM(BPF_SUB, R4, 10),
1557 BPF_ALU64_REG(BPF_SUB, R5, R4),
1567 BPF_ALU64_REG(BPF_SUB, R6, R4),
1577 BPF_ALU64_REG(BPF_SUB, R7, R4),
1587 BPF_ALU64_REG(BPF_SUB, R8, R4),
1597 BPF_ALU64_REG(BPF_SUB, R9, R4),
1608 BPF_ALU64_REG(BPF_SUB, R0, R4),
1640 BPF_ALU64_REG(BPF_XOR, R4, R4),
1643 BPF_JMP_REG(BPF_JEQ, R3, R4, 1),
1645 BPF_ALU64_REG(BPF_SUB, R4, R4),
1649 BPF_JMP_REG(BPF_JEQ, R5, R4, 1),
1693 BPF_ALU64_IMM(BPF_MOV, R4, 4),
1703 BPF_ALU64_REG(BPF_MUL, R0, R4),
1715 BPF_ALU64_REG(BPF_MUL, R1, R4),
1733 BPF_ALU64_REG(BPF_MUL, R2, R4),
1755 BPF_MOV64_REG(R4, R3),
1756 BPF_MOV64_REG(R5, R4),
1765 BPF_ALU64_IMM(BPF_MOV, R4, 0),
1775 BPF_ALU64_REG(BPF_ADD, R0, R4),
1795 BPF_MOV64_REG(R4, R3),
1796 BPF_MOV64_REG(R5, R4),
1805 BPF_ALU32_IMM(BPF_MOV, R4, 0),
1815 BPF_ALU64_REG(BPF_ADD, R0, R4),
1835 BPF_MOV64_REG(R4, R3),
1836 BPF_MOV64_REG(R5, R4),
1845 BPF_LD_IMM64(R4, 0x0LL),
1855 BPF_ALU64_REG(BPF_ADD, R0, R4),
1898 BPF_MOV32_IMM(R4, -1234),
1899 BPF_JMP_REG(BPF_JEQ, R0, R4, 1),
1901 BPF_ALU64_IMM(BPF_AND, R4, 63),
1902 BPF_ALU64_REG(BPF_LSH, R0, R4), /* R0 <= 46 */
1908 BPF_ALU64_REG(BPF_LSH, R4, R2), /* R4 = 46 << 1 */
1909 BPF_JMP_IMM(BPF_JEQ, R4, 92, 1),
1911 BPF_MOV64_IMM(R4, 4),
1912 BPF_ALU64_REG(BPF_LSH, R4, R4), /* R4 = 4 << 4 */
1913 BPF_JMP_IMM(BPF_JEQ, R4, 64, 1),
1915 BPF_MOV64_IMM(R4, 5),
1916 BPF_ALU32_REG(BPF_LSH, R4, R4), /* R4 = 5 << 5 */
1917 BPF_JMP_IMM(BPF_JEQ, R4, 160, 1),
3140 BPF_LD_IMM64(R4, 0xffffffffffffffffLL),
3142 BPF_ALU64_REG(BPF_DIV, R2, R4),
6405 BPF_ALU32_IMM(BPF_MOV, R4, 0xfefb0000),
6409 BPF_JMP_REG(BPF_JNE, R2, R4, 1),