52 #define DST	regs[insn->dst_reg]  macro
998 		DST = DST OP SRC;	\  in ___bpf_prog_run()
1001 		DST = (u32) DST OP (u32) SRC;	\  in ___bpf_prog_run()
1004 		DST = DST OP IMM;		\  in ___bpf_prog_run()
1007 		DST = (u32) DST OP (u32) IMM;	\  in ___bpf_prog_run()
1020 		DST = (u32) -DST;  in ___bpf_prog_run()
1023 		DST = -DST;  in ___bpf_prog_run()
1026 		DST = (u32) SRC;  in ___bpf_prog_run()
1029 		DST = (u32) IMM;  in ___bpf_prog_run()
1032 		DST = SRC;  in ___bpf_prog_run()
1035 		DST = IMM;  in ___bpf_prog_run()
1038 		DST = (u64) (u32) insn[0].imm | ((u64) (u32) insn[1].imm) << 32;  in ___bpf_prog_run()
1042 		(*(s64 *) &DST) >>= SRC;  in ___bpf_prog_run()
1045 		(*(s64 *) &DST) >>= IMM;  in ___bpf_prog_run()
1048 		div64_u64_rem(DST, SRC, &tmp);  in ___bpf_prog_run()
1049 		DST = tmp;  in ___bpf_prog_run()
1052 		tmp = (u32) DST;  in ___bpf_prog_run()
1053 		DST = do_div(tmp, (u32) SRC);  in ___bpf_prog_run()
1056 		div64_u64_rem(DST, IMM, &tmp);  in ___bpf_prog_run()
1057 		DST = tmp;  in ___bpf_prog_run()
1060 		tmp = (u32) DST;  in ___bpf_prog_run()
1061 		DST = do_div(tmp, (u32) IMM);  in ___bpf_prog_run()
1064 		DST = div64_u64(DST, SRC);  in ___bpf_prog_run()
1067 		tmp = (u32) DST;  in ___bpf_prog_run()
1069 		DST = (u32) tmp;  in ___bpf_prog_run()
1072 		DST = div64_u64(DST, IMM);  in ___bpf_prog_run()
1075 		tmp = (u32) DST;  in ___bpf_prog_run()
1077 		DST = (u32) tmp;  in ___bpf_prog_run()
1082 			DST = (__force u16) cpu_to_be16(DST);  in ___bpf_prog_run()
1085 			DST = (__force u32) cpu_to_be32(DST);  in ___bpf_prog_run()
1088 			DST = (__force u64) cpu_to_be64(DST);  in ___bpf_prog_run()
1095 			DST = (__force u16) cpu_to_le16(DST);  in ___bpf_prog_run()
1098 			DST = (__force u32) cpu_to_le32(DST);  in ___bpf_prog_run()
1101 			DST = (__force u64) cpu_to_le64(DST);  in ___bpf_prog_run()
1155 		if (DST == SRC) {  in ___bpf_prog_run()
1161 		if (DST == IMM) {  in ___bpf_prog_run()
1167 		if (DST != SRC) {  in ___bpf_prog_run()
1173 		if (DST != IMM) {  in ___bpf_prog_run()
1179 		if (DST > SRC) {  in ___bpf_prog_run()
1185 		if (DST > IMM) {  in ___bpf_prog_run()
1191 		if (DST < SRC) {  in ___bpf_prog_run()
1197 		if (DST < IMM) {  in ___bpf_prog_run()
1203 		if (DST >= SRC) {  in ___bpf_prog_run()
1209 		if (DST >= IMM) {  in ___bpf_prog_run()
1215 		if (DST <= SRC) {  in ___bpf_prog_run()
1221 		if (DST <= IMM) {  in ___bpf_prog_run()
1227 		if (((s64) DST) > ((s64) SRC)) {  in ___bpf_prog_run()
1233 		if (((s64) DST) > ((s64) IMM)) {  in ___bpf_prog_run()
1239 		if (((s64) DST) < ((s64) SRC)) {  in ___bpf_prog_run()
1245 		if (((s64) DST) < ((s64) IMM)) {  in ___bpf_prog_run()
1251 		if (((s64) DST) >= ((s64) SRC)) {  in ___bpf_prog_run()
1257 		if (((s64) DST) >= ((s64) IMM)) {  in ___bpf_prog_run()
1263 		if (((s64) DST) <= ((s64) SRC)) {  in ___bpf_prog_run()
1269 		if (((s64) DST) <= ((s64) IMM)) {  in ___bpf_prog_run()
1275 		if (DST & SRC) {  in ___bpf_prog_run()
1281 		if (DST & IMM) {  in ___bpf_prog_run()
1292 		*(SIZE *)(unsigned long) (DST + insn->off) = SRC;	\  in ___bpf_prog_run()
1295 		*(SIZE *)(unsigned long) (DST + insn->off) = IMM;	\  in ___bpf_prog_run()
1298 		DST = *(SIZE *)(unsigned long) (SRC + insn->off);	\  in ___bpf_prog_run()
1308 			   (DST + insn->off));  in ___bpf_prog_run()
1312 			     (DST + insn->off));  in ___bpf_prog_run()