Lines Matching defs:drm_amdgpu_info_device
858 struct drm_amdgpu_info_device { struct
860 __u32 device_id;
862 __u32 chip_rev;
863 __u32 external_rev;
865 __u32 pci_rev;
866 __u32 family;
867 __u32 num_shader_engines;
868 __u32 num_shader_arrays_per_engine;
870 __u32 gpu_counter_freq;
871 __u64 max_engine_clock;
872 __u64 max_memory_clock;
874 __u32 cu_active_number;
876 __u32 cu_ao_mask;
877 __u32 cu_bitmap[4][4];
879 __u32 enabled_rb_pipes_mask;
880 __u32 num_rb_pipes;
881 __u32 num_hw_gfx_contexts;
882 __u32 _pad;
883 __u64 ids_flags;
885 __u64 virtual_address_offset;
887 __u64 virtual_address_max;
889 __u32 virtual_address_alignment;
891 __u32 pte_fragment_size;
892 __u32 gart_page_size;
894 __u32 ce_ram_size;
896 __u32 vram_type;
898 __u32 vram_bit_width;
900 __u32 vce_harvest_config;
902 __u32 gc_double_offchip_lds_buf;
904 __u64 prim_buf_gpu_addr;
906 __u64 pos_buf_gpu_addr;
908 __u64 cntl_sb_buf_gpu_addr;
910 __u64 param_buf_gpu_addr;
911 __u32 prim_buf_size;
912 __u32 pos_buf_size;
913 __u32 cntl_sb_buf_size;
914 __u32 param_buf_size;
916 __u32 wave_front_size;
918 __u32 num_shader_visible_vgprs;
920 __u32 num_cu_per_sh;
922 __u32 num_tcc_blocks;
924 __u32 gs_vgt_table_depth;
926 __u32 gs_prim_buffer_depth;
928 __u32 max_gs_waves_per_vgt;
929 __u32 _pad1;
931 __u32 cu_ao_bitmap[4][4];
933 __u64 high_va_offset;
935 __u64 high_va_max;