Lines Matching refs:M4U_LARB2_ID
21 #define M4U_LARB2_ID 2 macro
49 #define M4U_PORT_IMGO MTK_M4U_ID(M4U_LARB2_ID, 0)
50 #define M4U_PORT_RRZO MTK_M4U_ID(M4U_LARB2_ID, 1)
51 #define M4U_PORT_AAO MTK_M4U_ID(M4U_LARB2_ID, 2)
52 #define M4U_PORT_LCSO MTK_M4U_ID(M4U_LARB2_ID, 3)
53 #define M4U_PORT_ESFKO MTK_M4U_ID(M4U_LARB2_ID, 4)
54 #define M4U_PORT_IMGO_D MTK_M4U_ID(M4U_LARB2_ID, 5)
55 #define M4U_PORT_LSCI MTK_M4U_ID(M4U_LARB2_ID, 6)
56 #define M4U_PORT_LSCI_D MTK_M4U_ID(M4U_LARB2_ID, 7)
57 #define M4U_PORT_BPCI MTK_M4U_ID(M4U_LARB2_ID, 8)
58 #define M4U_PORT_BPCI_D MTK_M4U_ID(M4U_LARB2_ID, 9)
59 #define M4U_PORT_UFDI MTK_M4U_ID(M4U_LARB2_ID, 10)
60 #define M4U_PORT_IMGI MTK_M4U_ID(M4U_LARB2_ID, 11)
61 #define M4U_PORT_IMG2O MTK_M4U_ID(M4U_LARB2_ID, 12)
62 #define M4U_PORT_IMG3O MTK_M4U_ID(M4U_LARB2_ID, 13)
63 #define M4U_PORT_VIPI MTK_M4U_ID(M4U_LARB2_ID, 14)
64 #define M4U_PORT_VIP2I MTK_M4U_ID(M4U_LARB2_ID, 15)
65 #define M4U_PORT_VIP3I MTK_M4U_ID(M4U_LARB2_ID, 16)
66 #define M4U_PORT_LCEI MTK_M4U_ID(M4U_LARB2_ID, 17)
67 #define M4U_PORT_RB MTK_M4U_ID(M4U_LARB2_ID, 18)
68 #define M4U_PORT_RP MTK_M4U_ID(M4U_LARB2_ID, 19)
69 #define M4U_PORT_WR MTK_M4U_ID(M4U_LARB2_ID, 20)