320 		h = abs(par->vbe_modes[i].x_res - xres) +  in uvesafb_vbe_find_mode()
321 		    abs(par->vbe_modes[i].y_res - yres) +  in uvesafb_vbe_find_mode()
322 		    abs(depth - par->vbe_modes[i].depth);  in uvesafb_vbe_find_mode()
331 		if (h < d || (h == d && par->vbe_modes[i].depth > depth)) {  in uvesafb_vbe_find_mode()
339 			par->vbe_modes[match].depth != depth)  in uvesafb_vbe_find_mode()
489 	par->vbe_modes = kcalloc(par->vbe_modes_cnt,  in uvesafb_vbe_getmodes()
492 	if (!par->vbe_modes)  in uvesafb_vbe_getmodes()
505 		task->buf = par->vbe_modes + off;  in uvesafb_vbe_getmodes()
725 		mode = &par->vbe_modes[i];  in uvesafb_vbe_getmonspecs()
835 			if (par->vbe_modes[i].mode_id == vbemode) {  in uvesafb_vbe_init_mode()
838 						&par->vbe_modes[modeid]);  in uvesafb_vbe_init_mode()
890 			modeid = par->vbe_modes[0].mode_id;  in uvesafb_vbe_init_mode()
892 					&par->vbe_modes[modeid]);  in uvesafb_vbe_init_mode()
907 	uvesafb_setup_var(&info->var, info, &par->vbe_modes[modeid]);  in uvesafb_vbe_init_mode()
941 	    par->vbe_modes[i].mode_attr & VBE_MODE_VGACOMPAT) {  in uvesafb_setpalette()
1228 		mode = &par->vbe_modes[i];  in uvesafb_set_par()
1383 	mode = &par->vbe_modes[match];  in uvesafb_check_var()
1396 				!(par->vbe_modes[match].mode_attr & 0x100))  in uvesafb_check_var()
1400 				!(par->vbe_modes[match].mode_attr & 0x200))  in uvesafb_check_var()
1450 		h = par->vbe_modes[i].bytes_per_scan_line *  in uvesafb_init_info()
1451 					par->vbe_modes[i].y_res;  in uvesafb_init_info()
1564 			par->vbe_modes[i].x_res, par->vbe_modes[i].y_res,  in uvesafb_show_vbe_modes()
1565 			par->vbe_modes[i].depth, par->vbe_modes[i].mode_id);  in uvesafb_show_vbe_modes()
1571 static DEVICE_ATTR(vbe_modes, S_IRUGO, uvesafb_show_vbe_modes, NULL);
1702 		mode = &par->vbe_modes[i];  in uvesafb_probe()
1767 	kfree(par->vbe_modes);  in uvesafb_probe()
1789 		kfree(par->vbe_modes);  in uvesafb_remove()