177 #define sst_dac_write(reg,val)	__sst_dac_write(par->mmio_vbase, reg, val)  macro
874 		sst_dac_write(DACREG_WMA, 0); 	/* backdoor */  in sst_detect_att()
899 		sst_dac_write(DACREG_WMA, 0); 	/* backdoor */  in sst_detect_ti()
937 		sst_dac_write(DACREG_ICS_PLLRMA, 0x1);	/* f1 */  in sst_detect_ics()
940 		sst_dac_write(DACREG_ICS_PLLRMA, 0x7);	/* f7 */  in sst_detect_ics()
943 		sst_dac_write(DACREG_ICS_PLLRMA, 0xb);	/* fB */  in sst_detect_ics()
972 	sst_dac_write(DACREG_WMA, 0); 	/* backdoor */  in sst_set_pll_att_ti()
979 	sst_dac_write(DACREG_WMA, 0);  in sst_set_pll_att_ti()
984 	sst_dac_write(DACREG_RMR, (cr0 & 0xf0)  in sst_set_pll_att_ti()
1025 	sst_dac_write(DACREG_ICS_PLLRMA, DACREG_ICS_PLL_CTRL);  in sst_set_pll_ics()
1029 		sst_dac_write(DACREG_ICS_PLLWMA, 0x0);	/* CLK0, f0 */  in sst_set_pll_ics()
1030 		sst_dac_write(DACREG_ICS_PLLDATA, t->m);  in sst_set_pll_ics()
1031 		sst_dac_write(DACREG_ICS_PLLDATA, t->p << 5 | t->n);  in sst_set_pll_ics()
1033 		sst_dac_write(DACREG_ICS_PLLWMA, DACREG_ICS_PLL_CTRL);  in sst_set_pll_ics()
1034 		sst_dac_write(DACREG_ICS_PLLDATA,  in sst_set_pll_ics()
1040 		sst_dac_write(DACREG_ICS_PLLWMA, 0xa);	/* CLK1, fA */  in sst_set_pll_ics()
1041 		sst_dac_write(DACREG_ICS_PLLDATA, t->m);  in sst_set_pll_ics()
1042 		sst_dac_write(DACREG_ICS_PLLDATA, t->p << 5 | t->n);  in sst_set_pll_ics()
1044 		sst_dac_write(DACREG_ICS_PLLWMA, DACREG_ICS_PLL_CTRL);  in sst_set_pll_ics()
1045 		sst_dac_write(DACREG_ICS_PLLDATA,  in sst_set_pll_ics()
1062 	sst_dac_write(DACREG_WMA, 0); 	/* backdoor */  in sst_set_vidmod_att_ti()
1070 	sst_dac_write(DACREG_WMA, 0); 	/* backdoor */  in sst_set_vidmod_att_ti()
1078 		sst_dac_write(DACREG_RMR, (cr0 & 0x0f) | DACREG_CR0_16BPP);  in sst_set_vidmod_att_ti()
1092 		sst_dac_write(DACREG_ICS_CMD, DACREG_ICS_CMD_16BPP);  in sst_set_vidmod_ics()