Lines Matching refs:FLD_MOD

259 		l = FLD_MOD(l, 1, 0, 0);		/* PLL_STOPMODE */  in dss_pll_write_config_type_a()
260 l = FLD_MOD(l, cinfo->n - 1, hw->n_msb, hw->n_lsb); /* PLL_REGN */ in dss_pll_write_config_type_a()
261 l = FLD_MOD(l, cinfo->m, hw->m_msb, hw->m_lsb); /* PLL_REGM */ in dss_pll_write_config_type_a()
263 l = FLD_MOD(l, cinfo->mX[0] ? cinfo->mX[0] - 1 : 0, in dss_pll_write_config_type_a()
266 l = FLD_MOD(l, cinfo->mX[1] ? cinfo->mX[1] - 1 : 0, in dss_pll_write_config_type_a()
272 l = FLD_MOD(l, cinfo->mX[2] ? cinfo->mX[2] - 1 : 0, in dss_pll_write_config_type_a()
275 l = FLD_MOD(l, cinfo->mX[3] ? cinfo->mX[3] - 1 : 0, in dss_pll_write_config_type_a()
287 l = FLD_MOD(l, f, 4, 1); /* PLL_FREQSEL */ in dss_pll_write_config_type_a()
291 l = FLD_MOD(l, f, 3, 1); /* PLL_SELFREQDCO */ in dss_pll_write_config_type_a()
293 l = FLD_MOD(l, 1, 13, 13); /* PLL_REFEN */ in dss_pll_write_config_type_a()
294 l = FLD_MOD(l, 0, 14, 14); /* PHY_CLKINEN */ in dss_pll_write_config_type_a()
295 l = FLD_MOD(l, 0, 16, 16); /* M4_CLOCK_EN */ in dss_pll_write_config_type_a()
296 l = FLD_MOD(l, 0, 18, 18); /* M5_CLOCK_EN */ in dss_pll_write_config_type_a()
297 l = FLD_MOD(l, 1, 20, 20); /* HSDIVBYPASS */ in dss_pll_write_config_type_a()
299 l = FLD_MOD(l, 3, 22, 21); /* REFSEL = sysclk */ in dss_pll_write_config_type_a()
300 l = FLD_MOD(l, 0, 23, 23); /* M6_CLOCK_EN */ in dss_pll_write_config_type_a()
301 l = FLD_MOD(l, 0, 25, 25); /* M7_CLOCK_EN */ in dss_pll_write_config_type_a()
319 l = FLD_MOD(l, 1, 14, 14); /* PHY_CLKINEN */ in dss_pll_write_config_type_a()
320 l = FLD_MOD(l, cinfo->mX[0] ? 1 : 0, 16, 16); /* M4_CLOCK_EN */ in dss_pll_write_config_type_a()
321 l = FLD_MOD(l, cinfo->mX[1] ? 1 : 0, 18, 18); /* M5_CLOCK_EN */ in dss_pll_write_config_type_a()
322 l = FLD_MOD(l, 0, 20, 20); /* HSDIVBYPASS */ in dss_pll_write_config_type_a()
323 l = FLD_MOD(l, cinfo->mX[2] ? 1 : 0, 23, 23); /* M6_CLOCK_EN */ in dss_pll_write_config_type_a()
324 l = FLD_MOD(l, cinfo->mX[3] ? 1 : 0, 25, 25); /* M7_CLOCK_EN */ in dss_pll_write_config_type_a()
349 l = FLD_MOD(l, cinfo->m, 20, 9); /* PLL_REGM */ in dss_pll_write_config_type_b()
350 l = FLD_MOD(l, cinfo->n - 1, 8, 1); /* PLL_REGN */ in dss_pll_write_config_type_b()
354 l = FLD_MOD(l, 0x0, 12, 12); /* PLL_HIGHFREQ divide by 2 */ in dss_pll_write_config_type_b()
355 l = FLD_MOD(l, 0x1, 13, 13); /* PLL_REFEN */ in dss_pll_write_config_type_b()
356 l = FLD_MOD(l, 0x0, 14, 14); /* PHY_CLKINEN */ in dss_pll_write_config_type_b()
358 l = FLD_MOD(l, 0x3, 22, 21); /* REFSEL = SYSCLK */ in dss_pll_write_config_type_b()
362 l = FLD_MOD(l, 0x4, 3, 1); in dss_pll_write_config_type_b()
364 l = FLD_MOD(l, 0x2, 3, 1); in dss_pll_write_config_type_b()
368 l = FLD_MOD(l, cinfo->sd, 17, 10); /* PLL_REGSD */ in dss_pll_write_config_type_b()
372 l = FLD_MOD(l, cinfo->mX[0], 24, 18); /* PLL_REGM2 */ in dss_pll_write_config_type_b()
373 l = FLD_MOD(l, cinfo->mf, 17, 0); /* PLL_REGM_F */ in dss_pll_write_config_type_b()