106 } dss;  variable
126 	__raw_writel(val, dss.base + idx.idx);  in dss_write_reg()
131 	return __raw_readl(dss.base + idx.idx);  in dss_read_reg()
135 	dss.ctx[(DSS_##reg).idx / sizeof(u32)] = dss_read_reg(DSS_##reg)
137 	dss_write_reg(DSS_##reg, dss.ctx[(DSS_##reg).idx / sizeof(u32)])
151 	dss.ctx_valid = true;  in dss_save_context()
160 	if (!dss.ctx_valid)  in dss_restore_context()
182 	if (!dss.syscon_pll_ctrl)  in dss_ctrl_pll_enable()
202 	regmap_update_bits(dss.syscon_pll_ctrl, dss.syscon_pll_ctrl_offset,  in dss_ctrl_pll_enable()
211 	if (!dss.syscon_pll_ctrl)  in dss_ctrl_pll_set_control_mux()
266 	regmap_update_bits(dss.syscon_pll_ctrl, dss.syscon_pll_ctrl_offset,  in dss_ctrl_pll_set_control_mux()
374 	fclk_rate = clk_get_rate(dss.dss_clk);  in dss_dump_clocks()
430 	dss.dispc_clk_source = clk_src;  in dss_select_dispc_clk_source()
458 	dss.dsi_clk_source[dsi_module] = clk_src;  in dss_select_dsi_clk_source()
495 	dss.lcd_clk_source[ix] = clk_src;  in dss_select_lcd_clk_source()
500 	return dss.dispc_clk_source;  in dss_get_dispc_clk_source()
505 	return dss.dsi_clk_source[dsi_module];  in dss_get_dsi_clk_source()
513 		return dss.lcd_clk_source[ix];  in dss_get_lcd_clk_source()
517 		return dss.dispc_clk_source;  in dss_get_lcd_clk_source()
533 	if (dss.parent_clk == NULL) {  in dss_div_calc()
540 		fck = clk_round_rate(dss.dss_clk, fck);  in dss_div_calc()
545 	fckd_hw_max = dss.feat->fck_div_max;  in dss_div_calc()
547 	m = dss.feat->dss_fck_multiplier;  in dss_div_calc()
548 	prate = clk_get_rate(dss.parent_clk);  in dss_div_calc()
571 	r = clk_set_rate(dss.dss_clk, rate);  in dss_set_fck_rate()
575 	dss.dss_clk_rate = clk_get_rate(dss.dss_clk);  in dss_set_fck_rate()
577 	WARN_ONCE(dss.dss_clk_rate != rate,  in dss_set_fck_rate()
578 			"clk rate mismatch: %lu != %lu", dss.dss_clk_rate,  in dss_set_fck_rate()
586 	return dss.dss_clk_rate;  in dss_get_dispc_clk_rate()
598 	if (dss.parent_clk == NULL) {  in dss_setup_default_clock()
599 		fck = clk_round_rate(dss.dss_clk, max_dss_fck);  in dss_setup_default_clock()
601 		prate = clk_get_rate(dss.parent_clk);  in dss_setup_default_clock()
603 		fck_div = DIV_ROUND_UP(prate * dss.feat->dss_fck_multiplier,  in dss_setup_default_clock()
605 		fck = DIV_ROUND_UP(prate, fck_div) * dss.feat->dss_fck_multiplier;  in dss_setup_default_clock()
739 	return dss.feat->dpi_select_source(port, channel);  in dss_dpi_select_source()
746 	clk = devm_clk_get(&dss.pdev->dev, "fck");  in dss_get_clocks()
752 	dss.dss_clk = clk;  in dss_get_clocks()
754 	if (dss.feat->parent_clk_name) {  in dss_get_clocks()
755 		clk = clk_get(NULL, dss.feat->parent_clk_name);  in dss_get_clocks()
757 			DSSERR("Failed to get %s\n", dss.feat->parent_clk_name);  in dss_get_clocks()
764 	dss.parent_clk = clk;  in dss_get_clocks()
771 	if (dss.parent_clk)  in dss_put_clocks()
772 		clk_put(dss.parent_clk);  in dss_put_clocks()
781 	r = pm_runtime_get_sync(&dss.pdev->dev);  in dss_runtime_get()
792 	r = pm_runtime_put_sync(&dss.pdev->dev);  in dss_runtime_put()
939 	if (dss.feat->num_ports == 0)  in dss_init_ports()
950 		if (reg >= dss.feat->num_ports)  in dss_init_ports()
953 		port_type = dss.feat->ports[reg];  in dss_init_ports()
986 	if (dss.feat->num_ports == 0)  in dss_uninit_ports()
998 		if (reg >= dss.feat->num_ports)  in dss_uninit_ports()
1001 		port_type = dss.feat->ports[reg];  in dss_uninit_ports()
1026 		dss.syscon_pll_ctrl = syscon_regmap_lookup_by_phandle(np,  in dss_video_pll_probe()
1028 		if (IS_ERR(dss.syscon_pll_ctrl)) {  in dss_video_pll_probe()
1031 			return PTR_ERR(dss.syscon_pll_ctrl);  in dss_video_pll_probe()
1035 				&dss.syscon_pll_ctrl_offset)) {  in dss_video_pll_probe()
1061 		dss.video1_pll = dss_video_pll_init(pdev, 0, pll_regulator);  in dss_video_pll_probe()
1062 		if (IS_ERR(dss.video1_pll))  in dss_video_pll_probe()
1063 			return PTR_ERR(dss.video1_pll);  in dss_video_pll_probe()
1067 		dss.video2_pll = dss_video_pll_init(pdev, 1, pll_regulator);  in dss_video_pll_probe()
1068 		if (IS_ERR(dss.video2_pll)) {  in dss_video_pll_probe()
1069 			dss_video_pll_uninit(dss.video1_pll);  in dss_video_pll_probe()
1070 			return PTR_ERR(dss.video2_pll);  in dss_video_pll_probe()
1085 	dss.pdev = pdev;  in dss_bind()
1087 	dss.feat = dss_get_features();  in dss_bind()
1088 	if (!dss.feat)  in dss_bind()
1091 	dss_mem = platform_get_resource(dss.pdev, IORESOURCE_MEM, 0);  in dss_bind()
1097 	dss.base = devm_ioremap(&pdev->dev, dss_mem->start,  in dss_bind()
1099 	if (!dss.base) {  in dss_bind()
1126 	dss.dss_clk_rate = clk_get_rate(dss.dss_clk);  in dss_bind()
1138 	dss.dsi_clk_source[0] = OMAP_DSS_CLK_SRC_FCK;  in dss_bind()
1139 	dss.dsi_clk_source[1] = OMAP_DSS_CLK_SRC_FCK;  in dss_bind()
1140 	dss.dispc_clk_source = OMAP_DSS_CLK_SRC_FCK;  in dss_bind()
1141 	dss.lcd_clk_source[0] = OMAP_DSS_CLK_SRC_FCK;  in dss_bind()
1142 	dss.lcd_clk_source[1] = OMAP_DSS_CLK_SRC_FCK;  in dss_bind()
1167 	if (dss.video1_pll)  in dss_bind()
1168 		dss_video_pll_uninit(dss.video1_pll);  in dss_bind()
1170 	if (dss.video2_pll)  in dss_bind()
1171 		dss_video_pll_uninit(dss.video2_pll);  in dss_bind()
1186 	if (dss.video1_pll)  in dss_unbind()
1187 		dss_video_pll_uninit(dss.video1_pll);  in dss_unbind()
1189 	if (dss.video2_pll)  in dss_unbind()
1190 		dss_video_pll_uninit(dss.video2_pll);  in dss_unbind()