84 	u32 gcfg, tcfg, ocfg, dclk_div, val;  in gx1_set_mode()  local
92 	gcfg = readl(par->dc_regs + DC_GENERAL_CFG);  in gx1_set_mode()
103 	gcfg &= ~(DC_GCFG_DFLE | DC_GCFG_CMPE | DC_GCFG_DECE);  in gx1_set_mode()
104 	writel(gcfg, par->dc_regs + DC_GENERAL_CFG);  in gx1_set_mode()
107 	gcfg &= ~DC_GCFG_DCLK_MASK;  in gx1_set_mode()
108 	writel(gcfg, par->dc_regs + DC_GENERAL_CFG);  in gx1_set_mode()
113 	gcfg |= dclk_div;  in gx1_set_mode()
114 	writel(gcfg, par->dc_regs + DC_GENERAL_CFG);  in gx1_set_mode()
126 	gcfg = DC_GCFG_VRDY | dclk_div;  in gx1_set_mode()
130 	gcfg |= (6 << DC_GCFG_DFHPEL_POS) | (5 << DC_GCFG_DFHPSL_POS) | DC_GCFG_DFLE;  in gx1_set_mode()
185 	writel(gcfg, par->dc_regs + DC_GENERAL_CFG);  in gx1_set_mode()