Lines Matching refs:pllMPLL_CNTL
661 rinfo->save_regs[73] = INPLL(pllMPLL_CNTL); in radeon_pm_save_regs()
1471 tmp = INPLL(pllMPLL_CNTL); in radeon_pm_all_ppls_off()
1472 OUTPLL(pllMPLL_CNTL, tmp | 0x3); in radeon_pm_all_ppls_off()
1519 tmp = INPLL(pllMPLL_CNTL); in radeon_pm_start_mclk_sclk()
1520 OUTREG8(CLOCK_CNTL_INDEX, pllMPLL_CNTL + PLL_WR_EN); in radeon_pm_start_mclk_sclk()
1531 tmp = INPLL(pllMPLL_CNTL); in radeon_pm_start_mclk_sclk()
1532 OUTPLL(pllMPLL_CNTL, tmp & ~0x2); in radeon_pm_start_mclk_sclk()
1533 (void)INPLL(pllMPLL_CNTL); in radeon_pm_start_mclk_sclk()
1538 tmp = INPLL(pllMPLL_CNTL); in radeon_pm_start_mclk_sclk()
1539 OUTPLL(pllMPLL_CNTL, tmp & ~0x1); in radeon_pm_start_mclk_sclk()
1540 (void)INPLL(pllMPLL_CNTL); in radeon_pm_start_mclk_sclk()
1863 OUTPLL(pllMPLL_CNTL, rinfo->save_regs[73] | 0x03); in radeon_reinitialize_M10()
2095 OUTPLL(pllMPLL_CNTL, rinfo->save_regs[73] | 0x03); in radeon_reinitialize_M9P()